High-speed systolic array for gene matching.

Gabriel Caffarena Slobodan Bojanic Juan A. López Carlos E. Pedreira Octavio Nieto-Taladriz

Published in: FPGA (2004)

Keyphrases

high speed
systolic array
reconfigurable architecture
matching algorithm
data flow
low power
image matching
gene expression
real time
parallel architecture
gene expression data
pattern matching
data sets
keypoints
graph matching
matching process
multi view
sequence alignment
data model