Domenik Helms

Publication Activity (10 Years)

Years Active: 2002-2023
Publications (10 Years): 11

Top Topics

Prediction Model

Power Electronics

Automatically Generate

Top Venues

Publications

Quentin Dariol, Sébastien Le Nours, Domenik Helms, Ralf Stemmer, Sébastien Pillement, Kim Grüttner
Fast Yet Accurate Timing and Power Prediction of Artificial Neural Networks Deployed on Clock-Gated Multi-Core Platforms. DroneSE/RAPIDO@HiPEAC (2023)
Pierpaolo Morì, Manoj Rohit Vemparala, Nael Fasfous, Saptarshi Mitra, Sreetama Sarkar, Alexander Frickenstein, Lukas Frickenstein, Domenik Helms, Naveen Shankar Nagaraja, Walter Stechele, Claudio Passerone
Accelerating and pruning CNNs for semantic segmentation on FPGA. DAC (2022)
Quentin Dariol, Sebastien Le Nours, Sébastien Pillement, Ralf Stemmer, Domenik Helms, Kim Grüttner
A Hybrid Performance Prediction Approach for Fully-Connected Artificial Neural Networks on Multi-core Platforms. SAMOS (2022)
Adrian Osterwind, Julian Droste-Rehling, Manoj Rohit Vemparala, Domenik Helms
Hardware Execution Time Prediction for Neural Network Layers. PKDD/ECML Workshops (1) (2022)
Arunachalam Thirunavukkarasu, Domenik Helms
Using Network Architecture Search for Optimizing Tensor Compression. IESS (2022)
Alwyn Burger, Chao Qian, Gregor Schiele, Domenik Helms
An Embedded CNN Implementation for On-Device ECG Analysis. PerCom Workshops (2020)
Domenik Helms, Reef Eilers, Malte Metzdorf, Wolfgang Nebel
Leakage Models for High-Level Power Estimation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (8) (2018)
Nils Koppaetzky, Malte Metzdorf, Reef Eilers, Domenik Helms, Wolfgang Nebel
Timing modeling at RT-level by separation of design- and stress related aging impacts. PATMOS (2017)
Sunil Malipatlolla, Ahmet Unutulmaz, Domenik Helms, Wolfgang Nebel
User dependent aging prediction model for automotive controllers with power electronics. PATMOS (2017)
Nils Koppaetzky, Malte Metzdorf, Reef Eilers, Domenik Helms, Wolfgang Nebel
RT level timing modeling for aging prediction. DATE (2016)
Ahmet Unutulmaz, Domenik Helms, Reef Eilers, Malte Metzdorf, Ben Kaczer, Wolfgang Nebel
Analysis of NBTI effects on high frequency digital circuits. DATE (2016)
Reef Eilers, Malte Metzdorf, Domenik Helms, Wolfgang Nebel
Efficient NBTI modeling technique considering recovery effects. ISLPED (2014)
Patrick Knocke, Ralph Görgen, Jörg Walter, Domenik Helms, Wolfgang Nebel
Using Early Power and Timing Estimations of Massively Heterogeneous Computation Platforms to Create Optimized HPC Applications. EUC (2014)
Kai Hylla, Philipp A. Hartmann, Domenik Helms, Wolfgang Nebel
Early Power & Timing Estimation of Custom Hardware Blocks based on Automatically Generated Combinatorial Macros. MBMV (2013)
Lars Kosmann, Axel Reimer, Domenik Helms, Wolfgang Nebel
Profilbasierte Energieabschätzung integrierter Schaltungen auf algorithmischer Ebene. MBMV (2013)
Reef Eilers, Malte Metzdorf, Sven Rosinger, Domenik Helms, Wolfgang Nebel
Phase Space Based NBTI Model. PATMOS (2012)
Sven Rosinger, Malte Metzdorf, Domenik Helms, Wolfgang Nebel
Behavioral-level thermal- and aging-estimation flow. LATW (2011)
Sven Rosinger, Domenik Helms, Wolfgang Nebel
RTL power modeling and estimation of sleep transistor based power gating. J. Embed. Comput. 3 (3) (2009)
Domenik Helms, Kai Hylla, Wolfgang Nebel
Hybrid logical-statistical simulation with thermal and IR-drop mapping for degradation and variation prediction. ISLPED (2009)
Wolfgang Nebel, Domenik Helms
On leakage currents: sources and reduction for transistors, gates, memories and digital systems. ISLPED (2008)
Ruzica Jevtic, Carlos Carreras, Domenik Helms
A Comparison of Approaches for High-Level Power Estimation of LUT-Based DSP Components. ReConFig (2008)
Domenik Helms, Olaf Meyer, Marko Hoyer, Wolfgang Nebel
Voltage- and ABB-island optimization in high level synthesis. ISLPED (2007)
Sven Rosinger, Domenik Helms, Wolfgang Nebel
RTL Power Modeling and Estimation of Sleep Transistor Based Power Gating. PATMOS (2007)
Marko Hoyer, Domenik Helms, Wolfgang Nebel
Modelling the Impact of High Level Leakage Optimization Techniques on the Delay of RT-Components. PATMOS (2007)
Domenik Helms, Wolfgang Nebel
Logic design techniques for 65 to 45nm and below for reducing total energy and solving technology variations problems. ICECS (2007)
Domenik Helms, Marko Hoyer, Wolfgang Nebel
Accurate PTV, State, and ABB Aware RTL Blackbox Modeling of Subthreshold, Gate, and PN-Junction Leakage. PATMOS (2006)
Domenik Helms, Günter Ehmen, Wolfgang Nebel
Analysis and modeling of subthreshold leakage of RT-components under PTV and state variation. ISLPED (2006)
Arne Schulz, Andreas Schallenberg, Domenik Helms, Milan Schulte, Axel Reimer, Wolfgang Nebel
A High Level Constant Coefficient Multiplier Power Model for Power Estimation on High Levels of Abstraction. PATMOS (2005)
Domenik Helms, Eike Schmidt, Wolfgang Nebel
Leakage in CMOS Circuits - An Introduction. PATMOS (2004)
Ansgar Stammermann, Domenik Helms, Milan Schulte, Arne Schulz, Wolfgang Nebel
Interconnect Driven Low Power High-Level Synthesis. PATMOS (2003)
Ansgar Stammermann, Domenik Helms, Milan Schulte, Arne Schulz, Wolfgang Nebel
Binding, Allocation and Floorplanning in Low Power High-Level Synthesis. ICCAD (2003)
Domenik Helms, Eike Schmidt, Arne Schulz, Ansgar Stammermann, Wolfgang Nebel
An Improved Power Macro-Model for Arithmetic Datapath Components. PATMOS (2002)