Binding, Allocation and Floorplanning in Low Power High-Level Synthesis.
Ansgar StammermannDomenik HelmsMilan SchulteArne SchulzWolfgang NebelPublished in: ICCAD (2003)
Keyphrases
- low power
- high level synthesis
- low cost
- power consumption
- high speed
- wireless transmission
- single chip
- parallel architecture
- digital signal processing
- logic circuits
- low power consumption
- vlsi architecture
- high power
- optimal allocation
- vlsi circuits
- gate array
- design space exploration
- cmos technology
- power dissipation
- image sensor
- graph cuts