Sreetama Sarkar

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 11

Top Topics

Parallel Architecture

Top Venues

ACM Great Lakes Symposium on VLSI

Publications

Sreetama Sarkar, Gourav Datta, Souvik Kundu, Kai Zheng, Chirayata Bhattacharyya, Peter A. Beerel
MaskVD: Region Masking for Efficient Video Object Detection. CoRR (2024)
Sreetama Sarkar, Souvik Kundu, Peter A. Beerel
Linearizing Models for Efficient yet Robust Private Inference. CoRR (2024)
Sreetama Sarkar, Souvik Kundu, Kai Zheng, Peter A. Beerel
Block Selective Reprogramming for On-device Training of Vision Transformers. CoRR (2024)
Md. Abdullah-Al Kaiser, Gourav Datta, Sreetama Sarkar, Souvik Kundu, Zihan Yin, Manas Garg, Ajey P. Jacob, Peter A. Beerel, Akhilesh R. Jaiswal
Technology-Circuit-Algorithm Tri-Design for Processing-in-Pixel-in-Memory (P2M). CoRR (2023)
Md. Abdullah-Al Kaiser, Gourav Datta, Sreetama Sarkar, Souvik Kundu, Zihan Yin, Manas Garg, Ajey P. Jacob, Peter A. Beerel, Akhilesh R. Jaiswal
Technology-Circuit-Algorithm Tri-Design for Processing-in-Pixel-in-Memory (P2M). ACM Great Lakes Symposium on VLSI (2023)
Pierpaolo Morì, Manoj Rohit Vemparala, Nael Fasfous, Saptarshi Mitra, Sreetama Sarkar, Alexander Frickenstein, Lukas Frickenstein, Domenik Helms, Naveen Shankar Nagaraja, Walter Stechele, Claudio Passerone
Accelerating and pruning CNNs for semantic segmentation on FPGA. DAC (2022)
Manoj Rohit Vemparala, Nael Fasfous, Alexander Frickenstein, Sreetama Sarkar, Qi Zhao, Sabine Kuhn, Lukas Frickenstein, Anmol Singh, Christian Unger, Naveen Shankar Nagaraja, Christian Wressnegger, Walter Stechele
Adversarial Robust Model Compression Using In-Train Pruning. CVPR Workshops (2021)
Rourab Paul, Sreetama Sarkar, Suman Sau, Koushik Chakraborty, Sanghamitra Roy, Amlan Chakrabarti
Voltage Scaling for Partitioned Systolic Array in A Reconfigurable Platform. CoRR (2021)
Swagata Mandal, Sreetama Sarkar, Ming Ming Wong, Anupam Chattopadhyay, Amlan Chakrabarti
Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM Based FPGA. VLSI Design (2019)
Swagata Mandal, Sreetama Sarkar, Ming Ming Wong, Anupam Chattopadhyay, Amlan Chakrabarti
Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM based FPGA. CoRR (2018)
Anish Pradhan, Soumi Basu, Sreetama Sarkar, Saptarshi Mitra, Sanjay Dhar Roy
Implementation of relay hopper model for reliable communication of IoT devices in LTE environment through D2D link. COMSNETS (2018)