Ming Ming Wong

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 26

Top Topics

Metal Oxide Semiconductor

Tree Search Algorithm

Top Venues

Publications

Bo Wang, Ming Ming Wong, D. Li, Yi Sheng Chong, Jun Zhou, Weng-Fai Wong, Li-Shiuan Peh, Aarthy Mani, Mohit Upadhyay, Ananta Narayanan Balaji, Anh Tuan Do
1.7pJ/SOP Neuromorphic Processor with Integrated Partial Sum Routers for In-Network Computing. ISCAS (2023)
Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong
Corrigendum to "Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency" [Neurocomputing (2022) 128-140]. Neurocomputing 508 (2022)
Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong
Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency. Neurocomputing 474 (2022)
Jingjing Lan, Vishnu P. Nambiar, Ming Ming Wong, Fei Li, Yuan Gao, Kevin Tshun Chuan Chai, Anh Tuan Do
, 953Gbps/W AES Accelerator for IoT Applications in 40nm CMOS. ISCAS (2022)
Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Ming Ming Wong, Anh Tuan Do
A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (12) (2021)
Ming Ming Wong, Lu Chen, Anh Tuan Do
A 25 TOPS/W High Power Efficiency Deterministic and Split Stochastic MAC (SC-MAC) Design. VLSI-SoC (2021)
Ming Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, K. T. C. Chai, Anh-Tuan Do
A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP. ESSCIRC (2021)
Xuyang Huang, Ming Ming Wong, Anh Tuan Do, Wang Ling Goh
A Backpropagation Extreme Learning Machine Approach to Fast Training Neural Network-Based Side-Channel Attack. AsianHOST (2021)
Ming Ming Wong, Lu Chen, Anh Tuan Do
An Improved Deterministic Stochastic MAC (SC-MAC) for High Power Efficiency Design. VLSI-SoC (Selected Papers) (2021)
Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs 68 (9) (2021)
Ming Ming Wong, S. B. Shrestha, Vishnu P. Nambiar, Aarthy Mani, Yun Kwan Lee, Eng-Kiat Koh, W. Jiang, K. T. C. Chai, Anh-Tuan Do
A 2.1 pJ/SOP 40nm SNN Accelerator Featuring On-chip Transfer Learning using Delta STDP. ESSDERC (2021)
Aarthy Mani, Fei Li, Ming Ming Wong, Luo Tao, Liwei Yang, Vishnu Paramasivam, Anh Tuan Do
Ultra-Low Leakage, High Fan-Out Neuro Connection Map with TCAM-Based LUT, Localized Priority Encoder and Decoder-Less SRAM. ISCAS (2020)
Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do
Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. ISCAS (2020)
Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, T. Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
0.5V 4.8 pJ/SOP 0.93\mu \mathrm{W}$ Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC (2020)
Jawad Haj-Yahya, Ming Ming Wong, Vikramkumar Pudi, Shivam Bhasin, Anupam Chattopadhyay
Lightweight Secure-Boot Architecture for RISC-V System-on-Chip. ISQED (2019)
Swagata Mandal, Sreetama Sarkar, Ming Ming Wong, Anupam Chattopadhyay, Amlan Chakrabarti
Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM Based FPGA. VLSI Design (2019)
Ming Ming Wong, Anh-Tuan Do
Folded and Deterministic Stochastic MAC for High Accuracy and Hardware Efficient Convolution Function. SoCC (2019)
Fei Li, Ming Ming Wong, Aarthy Mani, Vishnu Paramasivam, Anh-Tuan Do
0.54 pJ/bit, 15Mb/s True Random Number Generator Using Probabilistic Delay Cell for Edge Computing Applications. A-SSCC (2019)
Jia Jun Tay, M. L. Dennis Wong, Ming Ming Wong, Cishen Zhang, Ismat Hijazin
A tree search algorithm for low multiplicative complexity logic design. Future Gener. Comput. Syst. 83 (2018)
Swagata Mandal, Sreetama Sarkar, Ming Ming Wong, Anupam Chattopadhyay, Amlan Chakrabarti
Criticality Aware Soft Error Mitigation in the Configuration Memory of SRAM based FPGA. CoRR (2018)
Ming Ming Wong, Jawad Haj-Yahya, Suman Sau, Anupam Chattopadhyay
A New High Throughput and Area Efficient SHA-3 Implementation. ISCAS (2018)
Ming Ming Wong, Jawad Haj-Yahya, Anupam Chattopadhyay
SMARTS: secure memory assurance of RISC-V trusted SoC. HASP@ISCA (2018)
Jia Jun Tay, M. L. Dennis Wong, Ming Ming Wong, Cishen Zhang, Ismat Hijazin
) Inversion Circuit for Compact AES S-Box. TENCON (2018)
Ming Ming Wong, Vikramkumar Pudi, Anupam Chattopadhyay
Lightweight and High Performance SHA-256 using Architectural Folding and 4-2 Adder Compressor. VLSI-SoC (2018)
Suman Sau, Jawad Haj-Yahya, Ming Ming Wong, Kwok-Yan Lam, Anupam Chattopadhyay
Survey of secure processors. SAMOS (2017)
Ming Ming Wong, Mou Ling Dennis Wong
Stochastic Computing with Spiking Neural P Systems. J. Univers. Comput. Sci. 23 (7) (2017)
Ming Ming Wong, Mou Ling Dennis Wong, C. Zhang, Ismat Hijazin
Compact and short critical path finite field inverter for cryptographic S-box. DSP (2015)
Jia Jun Tay, Ming Ming Wong, Ismat Hijazin
Compact and low power AES block cipher using lightweight key expansion mechanism and optimal number of S-Boxes. ISPACS (2014)
Ming Ming Wong, M. L. Dennis Wong, Asoke K. Nandi, Ismat Hijazin
AES S-box using Fermat's Little Theorem for the highly constrained embedded devices. EUSIPCO (2012)
Ming Ming Wong, M. L. Dennis Wong, Asoke K. Nandi, Ismat Hijazin
Construction of Optimum Composite Field Architecture for Compact High-Throughput AES S-Boxes. IEEE Trans. Very Large Scale Integr. Syst. 20 (6) (2012)
Ming Ming Wong, M. L. Dennis Wong, Asoke K. Nandi, Ismat Hijazin
) advanced encryption standard (AES) S-box with algebraic normal form representation in the subfield inversion. IET Circuits Devices Syst. 5 (6) (2011)
Ming Ming Wong, M. L. Dennis Wong, Ismat Hijazin
A throughput maximised parallel architecture for 2D fast Discrete Pascal Transform. Comput. Electr. Eng. 36 (3) (2010)
Ming Ming Wong, M. L. Dennis Wong
A new common subexpression elimination algorithm with application in composite field AES S-box. ISSPA (2010)