Junran Pu

Publication Activity (10 Years)

Years Active: 2019-2023
Publications (10 Years): 12

Top Topics

Biologically Plausible

Processing Speed

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Chen Shen, Junran Pu, Yi Sheng Chong, Zhongyi Zhang, Wang Ling Goh, Bin Zhao, Anh Tuan Do, Yuan Gao
A 110nW Always-on Keyword Spotting Chip using Spiking CNN in 40nm CMOS. ISCAS (2023)
Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong
Corrigendum to "Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency" [Neurocomputing (2022) 128-140]. Neurocomputing 508 (2022)
Liwei Yang, Huaipeng Zhang, Tao Luo, Chuping Qu, Myat Thu Linn Aung, Yingnan Cui, Jun Zhou, Ming Ming Wong, Junran Pu, Anh Tuan Do, Rick Siow Mong Goh, Weng-Fai Wong
Coreset: Hierarchical neuromorphic computing supporting large-scale neural networks with improved resource efficiency. Neurocomputing 474 (2022)
Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Ming Ming Wong, Anh Tuan Do
A 5.28-mm² 4.5-pJ/SOP Energy-Efficient Spiking Neural Network Hardware With Reconfigurable High Processing Speed Neuron Core and Congestion-Aware Router. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (12) (2021)
Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Anh-Tuan Do
A Low Power and Low Area Router With Congestion-Aware Routing Algorithm for Spiking Neural Network Hardware Implementations. IEEE Trans. Circuits Syst. II Express Briefs 68 (1) (2021)
Junran Pu, Wang Ling Goh, Vishnu P. Nambiar, Yi Sheng Chong, Anh Tuan Do
A Low-Cost High-Throughput Digital Design of Biorealistic Spiking Neuron. IEEE Trans. Circuits Syst. II Express Briefs 68 (4) (2021)
Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
Energy Efficient 0.5V 4.8pJ/SOP 0.93μW Leakage/Core Neuromorphic Processor Design. IEEE Trans. Circuits Syst. II Express Briefs 68 (9) (2021)
Vishnu P. Nambiar, Eng-Kiat Koh, Junran Pu, Aarthy Mani, Ming Ming Wong, Li Fei, Wang Ling Goh, Anh Tuan Do
Scalable Block-Based Spiking Neural Network Hardware with a Multiplierless Neuron Model. ISCAS (2020)
Vishnu P. Nambiar, Junran Pu, Yun Kwan Lee, Aarthy Mani, T. Luo, L. Yang, Eng-Kiat Koh, Ming Ming Wong, Fei Li, Wang Ling Goh, Anh Tuan Do
0.5V 4.8 pJ/SOP 0.93\mu \mathrm{W}$ Leakage/core Neuromorphic Processor with Asynchronous NoC and Reconfigurable LIF Neuron. A-SSCC (2020)
Junran Pu, Vishnu P. Nambiar, Anh-Tuan Do, Wang Ling Goh
Block-Based Spiking Neural Network Hardware with Deme Genetic Algorithm. ISCAS (2019)
Yun Kwan Lee, Vishnu P. Nambiar, Junran Pu, Wang Ling Goh, Anh-Tuan Do
Coverage Driven Verification Methodology for Asynchronous Neuromorphic Routers. SoCC (2019)
Junran Pu, Vishnu P. Nambiar, Aarthy Mani, Wang Ling Goh, Anh-Tuan Do
Ower and Area Efficient Router with Automated Clock Gating for Neuromorphic Computing. SoCC (2019)