Suman Sau

Publication Activity (10 Years)

Years Active: 2011-2021
Publications (10 Years): 13

Top Topics

Secure Communication

Top Venues

IEEE Embed. Syst. Lett.

Publications

Rourab Paul, Nimisha Ghosh, Suman Sau, Amlan Chakrabarti, Prasant Mohapatra
Blockchain based secure smart city architecture using low resource IoTs. Comput. Networks 196 (2021)
Rourab Paul, Sreetama Sarkar, Suman Sau, Koushik Chakraborty, Sanghamitra Roy, Amlan Chakrabarti
Voltage Scaling for Partitioned Systolic Array in A Reconfigurable Platform. CoRR (2021)
Rourab Paul, Nimisha Ghosh, Suman Sau, Amlan Chakrabarti, Prasant Mahapatra
IoT based Smart Access Controlled Secure Smart City Architecture Using Blockchain. CoRR (2019)
Ming Ming Wong, Jawad Haj-Yahya, Suman Sau, Anupam Chattopadhyay
A New High Throughput and Area Efficient SHA-3 Implementation. ISCAS (2018)
Suman Sau, Jawad Haj-Yahya, Ming Ming Wong, Kwok-Yan Lam, Anupam Chattopadhyay
Survey of secure processors. SAMOS (2017)
Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay
Efficient dynamic priority based soft error mitigation techniques for configuration memory of FPGA hardware. Microprocess. Microsystems 51 (2017)
Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay
A Novel Method for Soft Error Mitigation in FPGA Using Modified Matrix Code. IEEE Embed. Syst. Lett. 8 (4) (2016)
Swagata Mandal, Suman Sau, Amlan Chakrabarti, Jogendra Saini, Sushanta Kumar Pal, Subhasish Chattopadhyay
FPGA based Novel High Speed DAQ System Design with Error Correction. CoRR (2015)
Swagata Mandal, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay
FPGA based High Speed Data Acquisition System for High Energy Physics Application. CoRR (2015)
Swagata Mandal, Rourab Paul, Suman Sau, Amlan Chakrabarti, Subhasis Chattopadhyay
A Novel Method for Soft Error Mitigation in FPGA using Adaptive Cross Parity Code. CoRR (2015)
Swagata Mandal, Suman Sau, Amlan Chakrabarti, Sushanta Kumar Pal, Subhasish Chattopadhyay
FPGA Implementation of High Speed Latency Optimized Optical Communication System Based on Orthogonal Concatenated Code. ATS (2015)
Suman Sau, Swagata Mandal, Jogender Saini, Amlan Chakrabarti, Subhasis Chattopadhyay
High speed fault tolerant secure communication for muon chamber using fpga based gbt emulator. CoRR (2015)
Swagata Mandal, Suman Sau, Amlan Chakrabarti, Jogendra Saini, Sushanta Kumar Pal, Subhasish Chattopadhyay
FPGA Based Novel High Speed DAQ System Design with Error Correction. ISVLSI (2015)
Sangeet Saha, Chandrajit Pal, Rourab Paul, Satyabrata Maity, Suman Sau
A brief experience on journey through hardware developments for image processing and its applications on Cryptography CoRR (2012)
Suman Sau, Rourab Paul, Tanmay Biswas, Amlan Chakrabarti
A novel AES-256 implementation on FPGA using co-processor based architecture. ICACCI (2012)
Rourab Paul, Suman Sau, Amlan Chakrabarti
Architecture for real time continuous sorting on large width data volume for fpga based applications CoRR (2012)
Rourab Paul, Sangeet Saha, Suman Sau, Amlan Chakrabarti
Design and implementation of real time AES-128 on real time operating system for multiple FPGA communication CoRR (2012)
Suman Sau, Chandrajit Pal, Amlan Chakrabarti
Design and implementation of real time secured RS232 link for multiple FPGA communication. ICCCS (2011)