Login / Signup
FPGA based Novel High Speed DAQ System Design with Error Correction.
Swagata Mandal
Suman Sau
Amlan Chakrabarti
Jogendra Saini
Sushanta Kumar Pal
Subhasish Chattopadhyay
Published in:
CoRR (2015)
Keyphrases
</>
error correction
high speed
data acquisition
error detection
channel coding
computational complexity
data analysis
image quality
error analysis
data hiding
hardware design
error detection and correction