A novel AES-256 implementation on FPGA using co-processor based architecture.
Suman SauRourab PaulTanmay BiswasAmlan ChakrabartiPublished in: ICACCI (2012)
Keyphrases
- xilinx virtex
- parallel architecture
- hardware implementation
- hardware architecture
- fpga device
- software implementation
- fpga technology
- instruction set
- hardware architectures
- field programmable gate array
- systolic array
- dedicated hardware
- hardware design
- memory management
- reconfigurable hardware
- fpga implementation
- general purpose processors
- high speed
- computation intensive
- parallel processing
- layered architecture
- single chip
- real time
- low cost
- processing elements
- architectural design
- signal processing
- fpga hardware
- level parallelism
- distributed memory
- management system
- industry standard
- parallel implementation
- advanced encryption standard
- shared memory
- data flow
- software architecture
- pipelined architecture