Sanghamitra Roy

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 33

Top Topics

Security Threats

Energy Efficiency

Routing Algorithm

Error Resilience

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

J. Low Power Electron.

Publications

Noel Daniel Gundi, Zinnia Muntaha Mowri, Andrew Chamberlin, Sanghamitra Roy, Koushik Chakraborty
STRIVE: Enabling Choke Point Detection and Timing Error Resilience in a Low-Power Tensor Processing Unit. DAC (2023)
Chidhambaranathan Rajamanikkam, Rajesh J. S., Sanghamitra Roy, Koushik Chakraborty
Understanding Security Threats in Emerging Neuromorphic Computing Architecture. J. Hardw. Syst. Secur. 5 (1) (2021)
Noel Daniel Gundi, Tahmoures Shabanian, Prabal Basu, Pramesh Pandey, Sanghamitra Roy, Koushik Chakraborty
EFFORT: A Comprehensive Technique to Tackle Timing Violations and Improve Energy Efficiency of Near-Threshold Tensor Processing Units. IEEE Trans. Very Large Scale Integr. Syst. 29 (10) (2021)
Rourab Paul, Sreetama Sarkar, Suman Sau, Koushik Chakraborty, Sanghamitra Roy, Amlan Chakrabarti
Voltage Scaling for Partitioned Systolic Array in A Reconfigurable Platform. CoRR (2021)
Riley Roberts, Benjamin Lewis, Arnd Hartmanns, Prabal Basu, Sanghamitra Roy, Koushik Chakraborty, Zhen Zhang
Probabilistic Verification for Reliability of a Two-by-Two Network-on-Chip System. CoRR (2021)
Riley Roberts, Benjamin Lewis, Arnd Hartmanns, Prabal Basu, Sanghamitra Roy, Koushik Chakraborty, Zhen Zhang
Probabilistic Verification for Reliability of a Two-by-Two Network-on-Chip System. FMICS (2021)
Pramesh Pandey, Noel Daniel Gundi, Koushik Chakraborty, Sanghamitra Roy
UPTPU: Improving Energy Efficiency of a Tensor Processing Unit through Underutilization Based Power-Gating. DAC (2021)
Prabal Basu, Pramesh Pandey, Aatreyi Bal, Chidhambaranathan Rajamanikkam, Koushik Chakraborty, Sanghamitra Roy
TITAN: Uncovering the Paradigm Shift in Security Vulnerability at Near-Threshold Computing. IEEE Trans. Emerg. Top. Comput. 8 (4) (2020)
Pramesh Pandey, Prabal Basu, Koushik Chakraborty, Sanghamitra Roy
GreenTPU: Predictive Design Paradigm for Improving Timing Error Resilience of a Near-Threshold Tensor Processing Unit. IEEE Trans. Very Large Scale Integr. Syst. 28 (7) (2020)
Sourav Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty
Exploring Warp Criticality in Near-Threshold GPGPU Applications Using a Dynamic Choke Point Analysis. IEEE Trans. Very Large Scale Integr. Syst. 28 (2) (2020)
Noel Daniel Gundi, Tahmoures Shabanian, Prabal Basu, Pramesh Pandey, Sanghamitra Roy, Koushik Chakraborty, Zhen Zhang
EFFORT: Enhancing Energy Efficiency and Error Resilience of a Near-Threshold Tensor Processing Unit. ASP-DAC (2020)
Chidhambaranathan Rajamanikkam, Rajesh J. S., Koushik Chakraborty, Sanghamitra Roy
Energy Efficient Network-on-Chip Architectures for Many-Core Near-Threshold Computing System. J. Low Power Electron. 15 (2) (2019)
Sourav Sanyal, Prabal Basu, Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty
Predicting Critical Warps in Near-Threshold GPGPU Applications using a Dynamic Choke Point Analysis. DATE (2019)
Rajesh J. S., Chidhambaranathan Rajamanikkam, Koushik Chakraborty, Sanghamitra Roy
Securing Data Center Against Power Attacks. J. Hardw. Syst. Secur. 3 (2) (2019)
Pramesh Pandey, Prabal Basu, Koushik Chakraborty, Sanghamitra Roy
GreenTPU: Improving Timing Error Resilience of a Near-Threshold Tensor Processing Unit. DAC (2019)
Benjamin Lewis, Arnd Hartmanns, Prabal Basu, Rajesh Jayashankara Shridevi, Koushik Chakraborty, Sanghamitra Roy, Zhen Zhang
Probabilistic Verification for Reliable Network-on-Chip System Design. FMICS (2019)
Aatreyi Bal, Shamik Saha, Sanghamitra Roy, Koushik Chakraborty
Dynamic Choke Sensing for Timing Error Resilience in NTC Systems. IEEE Trans. Very Large Scale Integr. Syst. 26 (1) (2018)
Pramesh Pandey, Asmita Pal, Koushik Chakraborty, Sanghamitra Roy
Reliability and Uniformity Enhancement in 8T-SRAM based PUFs operating at NTC. ISLPED (2018)
Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty
Trident: A comprehensive timing error resilient technique against choke points at NTC. DATE (2018)
Tahmoures Shabanian, Aatreyi Bal, Prabal Basu, Koushik Chakraborty, Sanghamitra Roy
ACE-GPU: Tackling Choke Point Induced Performance Bottlenecks in a Near-Threshold Computing GPU. ISLPED (2018)
Prabal Basu, Chidhambaranathan Rajamanikkam, Aatreyi Bal, Pramesh Pandey, Trevor Carter, Koushik Chakraborty, Sanghamitra Roy
FIFA: Exploring a Focally Induced Fault Attack Strategy in Near-Threshold Computing. IEEE Embed. Syst. Lett. 10 (4) (2018)
Aatreyi Bal, Sanghamitra Roy, Koushik Chakraborty
Trident: Comprehensive Choke Error Mitigation in NTC Systems. IEEE Trans. Very Large Scale Integr. Syst. 26 (11) (2018)
Chidhambaranathan Rajamanikkam, Kurt Brenning, Andrew Deakin, Sanghamitra Roy, Koushik Chakraborty
TASPDetect: Reviving Trust in 3PIP By Detecting TASP Trojans. Microprocess. Microsystems 56 (2018)
Shamik Saha, Prabal Basu, Chidhambaranathan Rajamanikkam, Aatreyi Bal, Koushik Chakraborty, Sanghamitra Roy
SSAGA: SMs Synthesized for Asymmetric GPGPU Applications. ACM Trans. Design Autom. Electr. Syst. 22 (3) (2017)
Aatreyi Bal, Shamik Saha, Sanghamitra Roy, Koushik Chakraborty
Revamping timing error resilience to tackle choke points at NTC systems. DATE (2017)
Asmita Pal, Aatreyi Bal, Koushik Chakraborty, Sanghamitra Roy
Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold Graphics Processing Unit. J. Low Power Electron. 13 (3) (2017)
Rajesh Jayashankara Shridevi, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Security Measures Against a Rogue Network-on-Chip. J. Hardw. Syst. Secur. 1 (2) (2017)
Prabal Basu, Rajesh Jayashankara Shridevi, Koushik Chakraborty, Sanghamitra Roy
IcoNoClast: Tackling Voltage Noise in the NoC Power Supply Through Flow-Control and Routing Algorithms. IEEE Trans. Very Large Scale Integr. Syst. 25 (7) (2017)
Rajesh Jayashankara Shridevi, Chidhambaranathan Rajamanikkam, Koushik Chakraborty, Sanghamitra Roy
Catching the flu: emerging threats from a third party power management unit. DAC (2016)
Chidhambaranathan Rajamanikkam, Rajesh J. S., Koushik Chakraborty, Sanghamitra Roy
BoostNoC: power efficient network-on-chip architecture for near threshold computing. ICCAD (2016)
Prabal Basu, Rajesh Jayashankara Shridevi, Koushik Chakraborty, Sanghamitra Roy
PRADA: Combating voltage noise in the NoC power supply through flow-control and routing algorithms. DATE (2016)
Prabal Basu, Hu Chen, Shamik Saha, Koushik Chakraborty, Sanghamitra Roy
SwiftGPU: fostering energy efficiency in a near-threshold GPU through a tactical performance boost. DAC (2016)
Atif Yasin, Jeff Jun Zhang, Hu Chen, Siddharth Garg, Sanghamitra Roy, Koushik Chakraborty
Synergistic timing speculation for multi-threaded programs. DAC (2016)
Hu Chen, Sanghamitra Roy, Koushik Chakraborty
DARP-MP: Dynamically Adaptable Resilient Pipeline Design in Multicore Processors. ACM Trans. Design Autom. Electr. Syst. 21 (1) (2015)
Rajesh J. S., Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Runtime Detection of a Bandwidth Denial Attack from a Rogue Network-on-Chip. NOCS (2015)
Dean Michael Ancajas, Kshitij Bhardwaj, Koushik Chakraborty, Sanghamitra Roy
Wearout Resilience in NoCs Through an Aging Aware Adaptive Routing Algorithm. IEEE Trans. Very Large Scale Integr. Syst. 23 (2) (2015)
Rajesh Jayashankara Shridevi, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Tackling voltage emergencies in NoC through timing error resilience. ISLPED (2015)
Hu Chen, Dieudonne Manzi, Sanghamitra Roy, Koushik Chakraborty
Opportunistic turbo execution in NTC: exploiting the paradigm shift in performance bottlenecks. DAC (2015)
Dieudonne Manzi Mugisha, Hu Chen, Sanghamitra Roy, Koushik Chakraborty
Resilient Cache Design for Mobile Processors in the Near-Threshold Regime. J. Low Power Electron. 11 (2) (2015)
Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty
Dark Silicon Aware Multicore Systems: Employing Design Automation With Architectural Insight. IEEE Trans. Very Large Scale Integr. Syst. 22 (5) (2014)
Hu Chen, Sanghamitra Roy, Koushik Chakraborty
Exploiting static and dynamic locality of timing errors in robust L1 cache design. ISQED (2014)
Hu Chen, Sanghamitra Roy, Koushik Chakraborty
DARP: Dynamically Adaptable Resilient Pipeline design in microprocessors. DATE (2014)
Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Fort-NoCs: Mitigating the Threat of a Compromised NoC. DAC (2014)
Yiding Han, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Exploring High-Throughput Computing Paradigm for Global Routing. IEEE Trans. Very Large Scale Integr. Syst. 22 (1) (2014)
Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy, Jason M. Allred
Tackling QoS-induced aging in exascale systems through agile path selection. CODES+ISSS (2014)
Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty
Long term sustainability of differentially reliable systems in the dark silicon era. ICCD (2013)
Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
DMR3D: dynamic memory relocation in 3D multicore systems. DAC (2013)
Dean Michael Ancajas, James McCabe Nickerson, Koushik Chakraborty, Sanghamitra Roy
HCI-tolerant NoC router microarchitecture. DAC (2013)
Satyajit Desai, Sanghamitra Roy
Using Adaptive Body Biasing for Robust Process Variation Aware DRAM Design. J. Low Power Electron. 9 (1) (2013)
Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Proactive aging management in heterogeneous NoCs through a criticality-driven routing approach. DATE (2013)
Koushik Chakraborty, Sanghamitra Roy
Architecturally Homogeneous Power-Performance Heterogeneous Multicore Systems. IEEE Trans. Very Large Scale Integr. Syst. 21 (4) (2013)
Yiding Han, Koushik Chakraborty, Sanghamitra Roy
A global router on GPU architecture. ICCD (2013)
Koushik Chakraborty, Brennan Cozzens, Sanghamitra Roy, Dean Michael Ancajas
Efficiently tolerating timing violations in pipelined microprocessors. DAC (2013)
Kshitij Bhardwaj, Sanghamitra Roy, Koushik Chakraborty
Power-Performance Yield optimization for MPSoCs using MILP. ISQED (2012)
Satyajit Desai, Sanghamitra Roy, Koushik Chakraborty
Process variation aware DRAM design using block based adaptive body biasing algorithm. ISQED (2012)
Kshitij Bhardwaj, Koushik Chakraborty, Sanghamitra Roy
Towards graceful aging degradation in NoCs through an adaptive routing algorithm. DAC (2012)
Sanghamitra Roy, Koushik Chakraborty
Predicting timing violations through instruction-level path sensitization analysis. DAC (2012)
Yiding Han, Koushik Chakraborty, Sanghamitra Roy
DOC: Fast and accurate congestion analysis for global routing. ICCD (2012)
Saurabh Kothawade, Koushik Chakraborty, Sanghamitra Roy, Yiding Han
Analysis of intermittent timing fault vulnerability. Microelectron. Reliab. 52 (7) (2012)
Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty
Designing for dark silicon: a methodological perspective on energy efficient systems. ISLPED (2012)
Koushik Chakraborty, Sanghamitra Roy
Stack Aware Threshold Voltage Assignment in 3-D Multicore Designs. IEEE Trans. Very Large Scale Integr. Syst. 20 (3) (2012)
Saurabh Kothawade, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Mitigating NBTI in the physical register file through stress prediction. ICCD (2012)
Kshitij Bhardwaj, Koushik Chakraborty, Sanghamitra Roy
An MILP-based aging-aware routing algorithm for NoCs. DATE (2012)
Mandar Padmawar, Sanghamitra Roy, Koushik Chakraborty
Microprocessor Power Supply Noise Aware Floorplanning Using a Circuit-Architectural Framework. J. Low Power Electron. 7 (3) (2011)
Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala
A GPU Algorithm for IC Floorplanning: Specification, Analysis and Optimization. VLSI Design (2011)
Saurabh Kothawade, Koushik Chakraborty, Sanghamitra Roy
Analysis and mitigation of NBTI aging in register file: An end-to-end approach. ISQED (2011)
Yiding Han, Koushik Chakraborty, Sanghamitra Roy, Vilasita Kuntamukkala
Design and Implementation of a Throughput-Optimized GPU Floorplanning Algorithm. ACM Trans. Design Autom. Electr. Syst. 16 (3) (2011)
Koushik Chakraborty, Sanghamitra Roy
Topologically homogeneous power-performance heterogeneous multicore systems. DATE (2011)
Mandar Padmawar, Sanghamitra Roy, Koushik Chakraborty
Integrated circuit-architectural framework for PSN aware floorplanning in microprocessors. ISQED (2011)
Yiding Han, Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
Exploring high throughput computing paradigm for global routing. ICCAD (2011)
Sanghamitra Roy, Koushik Chakraborty
Exploiting dynamic micro-architecture usage in gate sizing. Microprocess. Microsystems 35 (4) (2011)
Yiding Han, Sanghamitra Roy, Koushik Chakraborty
Optimizing simulated annealing on GPU: A case study with IC floorplanning. ISQED (2011)
Koushik Chakraborty, Sanghamitra Roy
A Novel Threshold Voltage Assignment for 3D Multicore Designs. J. Low Power Electron. 6 (3) (2010)
Sanghamitra Roy, Koushik Chakraborty
Microarchitecture aware gate sizing: A framework for circuit-architecture co-optimization. ICCD (2010)
Sanghamitra Roy, Koushik Chakraborty
A convex optimization framework for leakage aware thermal provisioning in 3D multicore architectures. ISQED (2010)
Koushik Chakraborty, Sanghamitra Roy
Rethinking Threshold Voltage Assignment in 3D Multicore Designs. VLSI Design (2010)
Sanghamitra Roy, Yu Hen Hu, Charlie Chung-Ping Chen, Shih-Pin Hung, Tse-Yu Chiang, Jiuan-Guei Tseng
An optimal algorithm for sizing sequential circuits for industrial library based designs. ASP-DAC (2008)
Sanghamitra Roy, Weijen Chen, Charlie Chung-Ping Chen, Yu Hen Hu
Numerically Convex Forms and Their Application in Gate Sizing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (9) (2007)
Sanghamitra Roy, Charlie Chung-Ping Chen
SmartSmooth: A linear time convexity preserving smoothing algorithm for numerically convex data with application to VLSI design. ASP-DAC (2007)
Sanghamitra Roy, Charlie Chung-Ping Chen
ConvexSmooth: A simultaneous convex fitting and smoothing algorithm for convex optimization problems. ISQED (2006)
Sanghamitra Roy, Weijen Chen
ConvexFit: an optimal minimum-error convex fitting and smoothing algorithm with application to gate-sizing. ICCAD (2005)
Sanghamitra Roy, Prith Banerjee
An Algorithm for Trading Off Quantization Error with Hardware Resources for MATLAB-Based FPGA Design. IEEE Trans. Computers 54 (7) (2005)
Sanghamitra Roy, Prithviraj Banerjee
An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design. DAC (2004)
Sanghamitra Roy, Debjit Sinha, Prithviraj Banerjee
An algorithm for trading off quantization error with hardware resources for MATLAB based FPGA design. FPGA (2004)
Biswajit Sarkar, Sanghamitra Roy, Debranjan Sarkar
Hierarchical representation of digitized curves through dominant point detection. Pattern Recognit. Lett. 24 (15) (2003)