Atif Yasin

Publication Activity (10 Years)

Years Active: 2016-2023
Publications (10 Years): 15

Top Topics

Software Requirements

Formal Verification

Top Venues

Publications

Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski
Formal Verification of Divider Circuits by Hardware Reduction. SMACD (2023)
Maciej J. Ciesielski, Atif Yasin, Jiteshri Dasari
Functional Verification of Arithmetic Circuits: Survey of Formal Methods. DDECS (2022)
Maciej J. Ciesielski, Tiankai Su, Atif Yasin, Cunxi Yu
Understanding Algebraic Rewriting for Arithmetic Circuit Verification: A Bit-Flow Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (6) (2020)
Dinesh D. Narasimharaju, R. S. Suraj Rao, Akshaya Sandeep Waingade, Atif Yasin, Maciej J. Ciesielski
Dual Approach to Solving SAT in Hardware. DTIS (2020)
Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski
SPEAR: Hardware-based Implicit Rewriting for Square-root Circuit Verification. DATE (2020)
Tiankai Su, Atif Yasin, Sébastien Pillement, Maciej J. Ciesielski
Formal Verification of Constrained Arithmetic Circuits using Computer Algebraic Approach. ISVLSI (2020)
Cunxi Yu, Tiankai Su, Atif Yasin, Maciej J. Ciesielski
Spectral approach to verifying non-linear arithmetic circuits. ASP-DAC (2019)
Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski
Functional Verification of Hardware Dividers using Algebraic Model. VLSI-SoC (2019)
Rubia Fatima, Affan Yasin, Lin Liu, Jianmin Wang, Wasif Afzal, Atif Yasin
Improving software requirements reasoning by novices: a story-based approach. IET Softw. 13 (6) (2019)
Cunxi Yu, Tiankai Su, Atif Yasin, Maciej J. Ciesielski
Spectral Approach to Verifying Non-linear Arithmetic Circuits. CoRR (2019)
Atif Yasin, Tiankai Su, Sébastien Pillement, Maciej J. Ciesielski
Formal Verification of Integer Dividers: Division by a Constant. ISVLSI (2019)
Tiankai Su, Atif Yasin, Cunxi Yu, Maciej J. Ciesielski
Computer Algebraic Approach to Verification and Debugging of Galois Field Multipliers. ISCAS (2018)
Cunxi Yu, Atif Yasin, Tiankai Su, Alan Mishchenko, Maciej J. Ciesielski
Rewriting Environment for Arithmetic Circuit Verification. LPAR (2018)
Tiankai Su, Cunxi Yu, Atif Yasin, Maciej J. Ciesielski
Formal Verification of Truncated Multipliers Using Algebraic Approach and Re-Synthesis. ISVLSI (2017)
Atif Yasin, Jeff Jun Zhang, Hu Chen, Siddharth Garg, Sanghamitra Roy, Koushik Chakraborty
Synergistic timing speculation for multi-threaded programs. DAC (2016)