David Biancolin

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 12

Top Topics

Hardware Implementation

Gaussian Kernels

Simulation Models

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

Publications

Kevin Laeufer, Vighnesh Iyer, David Biancolin, Jonathan Bachrach, Borivoje Nikolic, Koushik Sen
Simulator Independent Coverage for RTL Hardware Languages. ASPLOS (3) (2023)
David Biancolin, Albert Magyar, Sagar Karandikar, Alon Amid, Borivoje Nikolic, Jonathan Bachrach, Krste Asanovic
Accessible, FPGA Resource-Optimized Simulation of Multiclock Systems in FireSim. IEEE Micro 41 (4) (2021)
Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Yakun Sophia Shao, Krste Asanovic, Borivoje Nikolic
Chipyard: Integrated Design, Simulation, and Implementation Framework for Custom SoCs. IEEE Micro 40 (4) (2020)
Alon Amid, David Biancolin, Abraham Gonzalez, Daniel Grubb, Sagar Karandikar, Harrison Liew, Albert Magyar, Howard Mao, Albert J. Ou, Nathan Pemberton, Paul Rigge, Colin Schmidt, John Charles Wright, Jerry Zhao, Jonathan Bachrach, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic
Invited: Chipyard - An Integrated SoC Research and Implementation Environment. DAC (2020)
Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Howard Katz, Jonathan Bachrach, Krste Asanovic
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. IEEE Micro 39 (3) (2019)
Albert Magyar, David Biancolin, John Koenig, Sanjit Seshia, Jonathan Bachrach, Krste Asanovic
Golden Gate: Bridging The Resource-Efficiency Gap Between ASICs and FPGA Prototypes. ICCAD (2019)
David Biancolin, Sagar Karandikar, Donggyu Kim, Jack Koenig, Andrew Waterman, Jonathan Bachrach, Krste Asanovic
FASED: FPGA-Accelerated Simulation and Evaluation of DRAM. FPGA (2019)
Donggyu Kim, Christopher Celio, Sagar Karandikar, David Biancolin, Jonathan Bachrach, Krste Asanovic
DESSERT: Debugging RTL Effectively with State Snapshotting for Error Replays across Trillions of Cycles. FPL (2018)
Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. ISCA (2018)
Jack Koenig, David Biancolin, Jonathan Bachrach, Krste Asanovic
A Hardware Accelerator for Computing an Exact Dot Product. ARITH (2017)
Alex Rodionov, David Biancolin, Jonathan Rose
Fine-Grained Interconnect Synthesis. ACM Trans. Reconfigurable Technol. Syst. 9 (4) (2016)
Jonathan Bachrach, David Biancolin, Austin Buchan, Duncan W. Haldane, Richard Lin
JITPCB. IROS (2016)
Alex Rodionov, David Biancolin, Jonathan Rose
Fine-Grained Interconnect Synthesis. FPGA (2015)