Qijing Huang

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 28

Top Topics

Neural Architecture

Reinforcement Learning

High Level Synthesis

Top Venues

Publications

Sehoon Kim, Coleman Hooper, Thanakul Wattanawong, Minwoo Kang, Ruohan Yan, Hasan Genc, Grace Dinh, Qijing Huang, Kurt Keutzer, Michael W. Mahoney, Yakun Sophia Shao, Amir Gholami
Full Stack Optimization of Transformer Inference: a Survey. CoRR (2023)
Charles Hong, Qijing Huang, Grace Dinh, Mahesh Subedar, Yakun Sophia Shao
DOSA: Differentiable Model-Based One-Loop Search for DNN Accelerators. MICRO (2023)
Qijing Huang, Charles Hong, John Wawrzynek, Mahesh Subedar, Yakun Sophia Shao
Learning A Continuous and Reconstructible Latent Space for Hardware Accelerator Design. ISPASS (2022)
Qijing Huang, Minwoo Kang, Grace Dinh, Thomas Norell, Aravind Kalaiah, James Demmel, John Wawrzynek, Yakun Sophia Shao
CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. CoRR (2021)
Qijing Huang, Aravind Kalaiah, Minwoo Kang, James Demmel, Grace Dinh, John Wawrzynek, Thomas Norell, Yakun Sophia Shao
CoSA: Scheduling by Constrained Optimization for Spatial Accelerators. ISCA (2021)
Zhewei Yao, Zhen Dong, Zhangcheng Zheng, Amir Gholami, Jiali Yu, Eric Tan, Leyuan Wang, Qijing Huang, Yida Wang, Michael W. Mahoney, Kurt Keutzer
HAWQ-V3: Dyadic Neural Network Quantization. ICML (2021)
Zhen Dong, Yizhao Gao, Qijing Huang, John Wawrzynek, Hayden K. H. So, Kurt Keutzer
HAO: Hardware-aware neural Architecture Optimization for Efficient Inference. CoRR (2021)
Qijing Huang, Dequan Wang, Zhen Dong, Yizhao Gao, Yaohui Cai, Tian Li, Bichen Wu, Kurt Keutzer, John Wawrzynek
CoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs. FPGA (2021)
Zhen Dong, Yizhao Gao, Qijing Huang, John Wawrzynek, Hayden K. H. So, Kurt Keutzer
HAO: Hardware-aware Neural Architecture Optimization for Efficient Inference. FCCM (2021)
Farzad Farshchi, Qijing Huang, Heechul Yun
BRU: Bandwidth Regulation Unit for Real-Time Multicore Processors. RTAS (2020)
Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning. CoRR (2020)
Qijing Huang, Dequan Wang, Yizhao Gao, Yaohui Cai, Zhen Dong, Bichen Wu, Kurt Keutzer, John Wawrzynek
Algorithm-hardware Co-design for Deformable Convolution. CoRR (2020)
Zhewei Yao, Zhen Dong, Zhangcheng Zheng, Amir Gholami, Jiali Yu, Eric Tan, Leyuan Wang, Qijing Huang, Yida Wang, Michael W. Mahoney, Kurt Keutzer
HAWQV3: Dyadic Neural Network Quantization. CoRR (2020)
Ameer Haj-Ali, Hasan Genc, Qijing Huang, William S. Moses, John Wawrzynek, Krste Asanovic, Ion Stoica
ProTuner: Tuning Programs with Monte Carlo Tree Search. CoRR (2020)
Zhen Dong, Dequan Wang, Qijing Huang, Yizhao Gao, Yaohui Cai, Bichen Wu, Kurt Keutzer, John Wawrzynek
CoDeNet: Algorithm-hardware Co-design for Deformable Convolution. CoRR (2020)
Keertana Settaluri, Ameer Haj-Ali, Qijing Huang, Kourosh Hakhamaneshi, Borivoje Nikolic
AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs. DATE (2020)
Qijing Huang, Christopher Yarp, Sagar Karandikar, Nathan Pemberton, Benjamin Brock, Liang Ma, Guohao Dai, Robert Quitt, Krste Asanovic, John Wawrzynek
Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration. ICCAD (2019)
Farzad Farshchi, Qijing Huang, Heechul Yun
Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim. EMC2@HPCA/CVPR/ISCA (2019)
Lisa Wu, David Bruns-Smith, Frank A. Nothaft, Qijing Huang, Sagar Karandikar, Johnny Le, Andrew Lin, Howard Mao, Brendan Sweeney, Krste Asanovic, David A. Patterson, Anthony D. Joseph
FPGA Accelerated INDEL Realignment in the Cloud. HPCA (2019)
Qijing Huang, Dequan Wang, Yizhao Gao, Yaohui Cai, Zhen Dong, Bichen Wu, Kurt Keutzer, John Wawrzynek
Algorithm-hardware Co-design for Deformable Convolution. EMC2@NeurIPS (2019)
Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. FPGA (2019)
Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy Howard Katz, Jonathan Bachrach, Krste Asanovic
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. IEEE Micro 39 (3) (2019)
Ameer Haj Ali, Qijing Huang, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning. CoRR (2019)
Farzad Farshchi, Qijing Huang, Heechul Yun
Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim. CoRR (2019)
Qijing Huang, Ameer Haj-Ali, William S. Moses, John Xiang, Ion Stoica, Krste Asanovic, John Wawrzynek
AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning. FCCM (2019)
Yifan Yang, Qijing Huang, Bichen Wu, Tianjun Zhang, Liang Ma, Giulio Gambardella, Michaela Blott, Luciano Lavagno, Kees A. Vissers, John Wawrzynek, Kurt Keutzer
Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs. CoRR (2018)
Sagar Karandikar, Howard Mao, Donggyu Kim, David Biancolin, Alon Amid, Dayeol Lee, Nathan Pemberton, Emmanuel Amaro, Colin Schmidt, Aditya Chopra, Qijing Huang, Kyle Kovacs, Borivoje Nikolic, Randy H. Katz, Jonathan Bachrach, Krste Asanovic
FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud. ISCA (2018)
Shaoyi Cheng, Qijing Huang, John Wawrzynek
Synthesis of program binaries into FPGA accelerators with runtime dependence validation. FPT (2017)
Qijing Huang, Ruolong Lian, Andrew Canis, Jongsok Choi, Ryan Xi, Nazanin Calagar, Stephen Dean Brown, Jason Helge Anderson
The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware. ACM Trans. Reconfigurable Technol. Syst. 8 (3) (2015)
Andrew Canis, Jongsok Choi, Blair Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson
From software to accelerators with LegUp high-level synthesis. CASES (2013)
Qijing Huang, Ruolong Lian, Andrew Canis, Jongsok Choi, Ryan Xi, Stephen Dean Brown, Jason Helge Anderson
The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs. FCCM (2013)