Blair Fort

Publication Activity (10 Years)

Years Active: 2005-2018
Publications (10 Years): 3

Top Topics

Parallel Architecture

Top Venues

Publications

Bain Syrowik, Blair Fort, Stephen Dean Brown
Use of CPU Performance Counters for Accelerator Selection in HLS-Generated CPU-Accelerator Systems. HEART (2018)
Kevin Nam, Blair Fort, Stephen Dean Brown
FISH: Linux system calls for FPGA accelerators. FPL (2017)
Razvan Nane, Vlad Mihai Sima, Christian Pilato, Jongsok Choi, Blair Fort, Andrew Canis, Yu Ting Chen, Hsuan Hsiao, Stephen Dean Brown, Fabrizio Ferrandi, Jason Helge Anderson, Koen Bertels
A Survey and Evaluation of FPGA High-Level Synthesis Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (10) (2016)
Blair Fort, Andrew Canis, Jongsok Choi, Nazanin Calagar, Ruolong Lian, Stefan Hadjis, Yu Ting Chen, Mathew Hall, Bain Syrowik, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson
Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis. EUC (2014)
Jiu Cheng Cai, Ruolong Lian, Mengyao Wang, Andrew Canis, Jongsok Choi, Blair Fort, Eric Hart, Emily Miao, Yanyan Zhang, Nazanin Calagar, Stephen Dean Brown, Jason Helge Anderson
From C to Blokus Duo with LegUp high-level synthesis. FPT (2013)
Andrew Canis, Jongsok Choi, Blair Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson
From software to accelerators with LegUp high-level synthesis. CASES (2013)
Blair Fort, Davor Capalija, Zvonko G. Vranesic, Stephen Dean Brown
A Multithreaded Soft Processor for SoPC Area Reduction. FCCM (2006)
Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow
A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification. FPL (2006)
Franjo Plavec, Blair Fort, Zvonko G. Vranesic, Stephen Dean Brown
Experiences with Soft-Core Processor Design. IPDPS (2005)
Lesley Shannon, Blair Fort, Samir Parikh, Arun Patel, Manuel Saldaña, Paul Chow
Designing an FPGA SoC Using a Standardized IP Block Interface. FPT (2005)