Tomasz S. Czajkowski

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 8

Top Topics

Sparse Matrices

Top Venues

IPDPS Workshops

Publications

Kyle Zhao Bin Chen, Tarek S. Abdelrahman, Reza Azimi, Tomasz S. Czajkowski, Maziar Goudarzi
RoDMap: A Reserve-on-Demand Mapper for Spatially-Configured Coarse-Grained Reconfigurable Arrays. ICPP (2024)
Amir H. Ashouri, Muhammad Asif Manzoor, Duc Minh Vu, Raymond Zhang, Ziwen Wang, Angel Zhang, Bryan Chan, Tomasz S. Czajkowski, Yaoqing Gao
ACPO: AI-Enabled Compiler-Driven Program Optimization. CoRR (2023)
Mahdi Abbaszadeh, Tarek S. Abdelrahman, Reza Azimi, Tomasz S. Czajkowski, Maziar Goudarzi
Efficient Data Streaming for a Tightly-Coupled Coarse-Grained Reconfigurable Array. IPDPS Workshops (2023)
Lukasz Nowak, Artur Bak, Tomasz S. Czajkowski, Konrad Wojciechowski
Modeling and Rendering of Volumetric Clouds in Real-Time with Unreal Engine 4. ICCVG (2018)
Michal Rosenbeiger, Artur Bak, Tomasz S. Czajkowski
Real-Time Simulation of Animated Characters Crowd in Unreal Engine 4. ICCVG (2018)
Samridhi Bansal, Hsuan Hsiao, Tomasz S. Czajkowski, Jason Helge Anderson
High-level synthesis of software-customizable floating-point cores. DATE (2018)
Tomasz S. Czajkowski
Silicon Verification using High-Level Design Tools (Abstract Only). FPGA (2015)
Deshanand P. Singh, Bogdan Pasca, Tomasz S. Czajkowski
High-Level Design Tools for Floating Point FPGAs. FPGA (2015)
Blair Fort, Andrew Canis, Jongsok Choi, Nazanin Calagar, Ruolong Lian, Stefan Hadjis, Yu Ting Chen, Mathew Hall, Bain Syrowik, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson
Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis. EUC (2014)
Andrew Canis, Jongsok Choi, Blair Fort, Ruolong Lian, Qijing Huang, Nazanin Calagar, Marcel Gort, Jia Jun Qin, Mark Aldham, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson
From software to accelerators with LegUp high-level synthesis. CASES (2013)
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson
LegUp: An open-source high-level synthesis tool for FPGA-based processor/accelerator systems. ACM Trans. Embed. Comput. Syst. 13 (2) (2013)
Deshanand P. Singh, Tomasz S. Czajkowski, Andrew C. Ling
Harnessing the power of FPGAs using altera's OpenCL compiler. FPGA (2013)
Stefan Hadjis, Andrew Canis, Jason Helge Anderson, Jongsok Choi, Kevin Nam, Stephen Dean Brown, Tomasz S. Czajkowski
Impact of FPGA architecture on resource sharing in high-level synthesis. FPGA (2012)
Jongsok Choi, Kevin Nam, Andrew Canis, Jason Helge Anderson, Stephen Dean Brown, Tomasz S. Czajkowski
Impact of Cache Architecture and Interface on Performance and Area of FPGA-Based Processor/Parallel-Accelerator Systems. FCCM (2012)
Tomasz S. Czajkowski, Utku Aydonat, Dmitry Denisenko, John Freeman, Michael Kinsner, David Neto, Jason Wong, Peter Yiannacouras, Deshanand P. Singh
From opencl to high-performance hardware on FPGAS. FPL (2012)
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zhang, Ahmed Kammoona, Jason Helge Anderson, Stephen Dean Brown, Tomasz S. Czajkowski
LegUp: high-level synthesis for FPGA-based processor/accelerator systems. FPGA (2011)
Tomasz S. Czajkowski, Stephen Dean Brown
Decomposition-Based Vectorless Toggle Rate Computation for FPGA Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (11) (2010)
Tomasz S. Czajkowski, Stephen Dean Brown
Fast toggle rate computation for FPGA circuits. FPL (2008)
Tomasz S. Czajkowski, Stephen Dean Brown
Functionally Linear Decomposition and Synthesis of Logic Circuits for FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (12) (2008)
Tomasz S. Czajkowski, Stephen Dean Brown
Functionally linear decomposition and synthesis of logic circuits for FPGAs. DAC (2008)
Tomasz S. Czajkowski, Stephen Dean Brown
Using Negative Edge Triggered FFs to Reduce Glitching Power in FPGA Circuits. DAC (2007)
Tomasz S. Czajkowski, Jonathan Rose
A synthesis oriented omniscient manual editor. FPGA (2004)