Silicon Verification using High-Level Design Tools (Abstract Only).

Tomasz S. Czajkowski

Published in: FPGA (2015)

Keyphrases

design tools
high level
low level
computer aided
higher level
physical design
design space
instructional design
high speed
model checking
computer vision
low cost
lower level
neural network
knowledge level
programming language
learning algorithm
design principles
object oriented
data model
databases
development effort