Yu Ting Chen

Publication Activity (10 Years)

Years Active: 2014-2022
Publications (10 Years): 5

Top Topics

Parallel Architecture

High Level Synthesis

Embedded Systems

Top Venues

IEEE Trans. Computers

Publications

Jianyi Cheng, Shane T. Fleming, Yu Ting Chen, Jason Helge Anderson, John Wickerson, George A. Constantinides
Efficient Memory Arbitration in High-Level Synthesis From Multi-Threaded Code. IEEE Trans. Computers 71 (4) (2022)
Jianyi Cheng, Shane T. Fleming, Yu Ting Chen, Jason Helge Anderson, George A. Constantinides
EASY: Efficient Arbiter SYnthesis from Multi-threaded Code. FPGA (2019)
Yu Ting Chen, Jin Hee Kim, Kexin Li, Graham Hoyes, Jason Helge Anderson
High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered Routing. FPT (2019)
Yu Ting Chen, Jason Helge Anderson
Automated generation of banked memory architectures in the high-level synthesis of multi-threaded software. FPL (2017)
Razvan Nane, Vlad Mihai Sima, Christian Pilato, Jongsok Choi, Blair Fort, Andrew Canis, Yu Ting Chen, Hsuan Hsiao, Stephen Dean Brown, Fabrizio Ferrandi, Jason Helge Anderson, Koen Bertels
A Survey and Evaluation of FPGA High-Level Synthesis Tools. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (10) (2016)
Blair Fort, Andrew Canis, Jongsok Choi, Nazanin Calagar, Ruolong Lian, Stefan Hadjis, Yu Ting Chen, Mathew Hall, Bain Syrowik, Tomasz S. Czajkowski, Stephen Dean Brown, Jason Helge Anderson
Automating the Design of Processor/Accelerator Embedded Systems with LegUp High-Level Synthesis. EUC (2014)