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High-Level Synthesis Techniques to Generate Deeply Pipelined Circuits for FPGAs with Registered Routing.
Yu Ting Chen
Jin Hee Kim
Kexin Li
Graham Hoyes
Jason Helge Anderson
Published in:
FPT (2019)
Keyphrases
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high level synthesis
parallel architecture
hardware implementation
design space exploration
ad hoc networks
routing algorithm
data flow
parallel processing
higher order
cloud computing
routing protocol
field programmable gate array