Impact of Cache Architecture and Interface on Performance and Area of FPGA-Based Processor/Parallel-Accelerator Systems.
Jongsok ChoiKevin NamAndrew CanisJason Helge AndersonStephen Dean BrownTomasz S. CzajkowskiPublished in: FCCM (2012)
Keyphrases
- parallel implementation
- parallel architecture
- multi processor
- multithreading
- parallel processing
- high end
- hardware architectures
- processing elements
- management system
- processing units
- memory hierarchy
- client server architecture
- distributed memory
- embedded processors
- multiprocessor systems
- hardware architecture
- field programmable gate array
- user interface
- multi core processors
- memory management
- communication protocol
- distributed systems
- memory access
- single processor
- data access
- hardware implementation
- computer architecture
- level parallelism
- hardware design