Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs.
Yifan YangQijing HuangBichen WuTianjun ZhangLiang MaGiulio GambardellaMichaela BlottLuciano LavagnoKees A. VissersJohn WawrzynekKurt KeutzerPublished in: FPGA (2019)
Keyphrases
- hardware implementation
- computational complexity
- times faster
- detection algorithm
- high accuracy
- optimal solution
- preprocessing
- experimental evaluation
- cost function
- k means
- recognition algorithm
- embedded systems
- objective function
- convergence rate
- field programmable gate array
- matching algorithm
- learning algorithm
- optimization algorithm
- significant improvement
- image processing
- segmentation algorithm
- worst case
- np hard
- evolutionary algorithm
- search space