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Yih Wang
ORCID
Publication Activity (10 Years)
Years Active: 2005-2023
Publications (10 Years): 12
Top Topics
Cmos Technology
Write Operations
High Voltage
Power Dissipation
Top Venues
ISSCC
IEEE J. Solid State Circuits
VLSI Technology and Circuits
VLSIC
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Publications
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Haruki Mori
,
Wei-Chang Zhao
,
Cheng-En Lee
,
Chia-Fu Lee
,
Yu-Hao Hsu
,
Chao-Kai Chuang
,
Takeshi Hashizume
,
Hao-Chun Tung
,
Yao-Yi Liu
,
Shin-Rung Wu
,
Kerem Akarvardar
,
Tan-Li Chou
,
Hidehiro Fujiwara
,
Yih Wang
,
Yu-Der Chih
,
Yen-Huei Chen
,
Hung-Jen Liao
,
Tsung-Yung Jonathan Chang
A 4nm 6163-TOPS/W/b $\mathbf{4790-TOPS/mm^{2}/b}$ SRAM Based Digital-Computing-in-Memory Macro Supporting Bit-Width Flexibility and Simultaneous MAC and Weight Update.
ISSCC
(2023)
Wei-Xiang You
,
Cheng-Yin Wang
,
Yih Wang
,
Tsung-Yung Jonathan Chang
,
Szuya Sandy Liao
Write-enhanced Single-ended 11T SRAM Enabling Single Bitcell Reconfigurable Compute-in-Memory Employing Complementary FETs.
VLSI Technology and Circuits
(2023)
Masum Hossain
,
Arijit Raychowdhury
,
Sanu K. Mathew
,
Yakun Sophia Shao
,
Yih Wang
Guest Editorial Introduction to the Special Issue on the 2022 IEEE International Solid-State Circuits Conference (ISSCC).
IEEE J. Solid State Circuits
58 (1) (2023)
Po-Hao Lee
,
Chia-Fu Lee
,
Yi-Chun Shih
,
Hon-Jarn Lin
,
Yen-An Chang
,
Cheng-Han Lu
,
Yu-Lin Chen
,
Chieh-Pu Lo
,
Chung-Chieh Chen
,
Cheng-Hsiung Kuo
,
Tan-Li Chou
,
Chia-Yu Wang
,
J. J. Wu
,
Roger Wang
,
Harry Chuang
,
Yih Wang
,
Yu-Der Chih
,
Tsung-Yung Jonathan Chang
A 16nm 32Mb Embedded STT-MRAM with a 6ns Read-Access Time, a 1M-Cycle Write Endurance, 20-Year Retention at 150°C and MTJ-OTP Solutions for Magnetic Immunity.
ISSCC
(2023)
Nail Etkin Can Akkaya
,
Gary Chan
,
Hung-Jen Liao
,
Yih Wang
,
Jonathan Chang
A 135.6Tbps/W 2R2W SRAM with 12T Logic Bit-cell with Vmin Down to 335mV Targeted for Machine-Learning Applications in 6nm FinFET CMOS Technology.
VLSI Technology and Circuits
(2022)
Hidehiro Fujiwara
,
Haruki Mori
,
Wei-Chang Zhao
,
Mei-Chen Chuang
,
Rawan Naous
,
Chao-Kai Chuang
,
Takeshi Hashizume
,
Dar Sun
,
Chia-Fu Lee
,
Kerem Akarvardar
,
Saman Adham
,
Tan-Li Chou
,
Mahmut Ersin Sinangil
,
Yih Wang
,
Yu-Der Chih
,
Yen-Huei Chen
,
Hung-Jen Liao
,
Tsung-Yung Jonathan Chang
Fully-Digital Computing-in-Memory Macro Supporting Wide-Range Dynamic-Voltage-Frequency Scaling and Simultaneous MAC and Write Operations.
ISSCC
(2022)
Shaun Chou
,
Gu-Huan Li
,
Shawn Chen
,
Jun-Hao Chang
,
Wan-Hsueh Cheng
,
Shao-Ding Wu
,
Philex Fan
,
Chia-En Huang
,
Yu-Der Chih
,
Yih Wang
,
Jonathan Chang
A 16Kb Antifuse One-Time-Programmable Memory in 5nm High-K Metal-Gate Fin-FET CMOS Featuring Bootstrap High Voltage Scheme, Read Endpoint Detection and Pseudo-Differential Sensing.
VLSI Circuits
(2021)
Yu-Der Chih
,
Po-Hao Lee
,
Hidehiro Fujiwara
,
Yi-Chun Shih
,
Chia-Fu Lee
,
Rawan Naous
,
Yu-Lin Chen
,
Chieh-Pu Lo
,
Cheng-Han Lu
,
Haruki Mori
,
Wei-Cheng Zhao
,
Dar Sun
,
Mahmut E. Sinangil
,
Yen-Huei Chen
,
Tan-Li Chou
,
Kerem Akarvardar
,
Hung-Jen Liao
,
Yih Wang
,
Meng-Fan Chang
,
Tsung-Yung Jonathan Chang
All-Digital SRAM-Based Full-Precision Compute-In Memory Macro in 22nm for Machine-Learning Edge Applications.
ISSCC
(2021)
Mahmut E. Sinangil
,
Burak Erbagci
,
Rawan Naous
,
Kerem Akarvardar
,
Dar Sun
,
Win-San Khwa
,
Hung-Jen Liao
,
Yih Wang
,
Jonathan Chang
A 7-nm Compute-in-Memory SRAM Macro Supporting Multi-Bit Input, Weight and Output and Achieving 351 TOPS/W and 372.4 GOPS.
IEEE J. Solid State Circuits
56 (1) (2021)
Qing Dong
,
Mahmut E. Sinangil
,
Burak Erbagci
,
Dar Sun
,
Win-San Khwa
,
Hung-Jen Liao
,
Yih Wang
,
Jonathan Chang
15.3 A 351TOPS/W and 372.4GOPS Compute-in-Memory SRAM Macro in 7nm FinFET CMOS for Machine-Learning Applications.
ISSCC
(2020)
Yih Wang
Memory for Data-Centric Computing: A Technology Perspective.
VLSI-DAT
(2020)
Fatih Hamzaoglu
,
Umut Arslan
,
Nabhendra Bisnik
,
Swaroop Ghosh
,
Manoj B. Lal
,
Nick Lindert
,
Mesut Meterelliyoz
,
Randy B. Osborne
,
Joodong Park
,
Shigeki Tomishima
,
Yih Wang
,
Kevin Zhang
A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology.
IEEE J. Solid State Circuits
50 (1) (2015)
Fatih Hamzaoglu
,
Umut Arslan
,
Nabhendra Bisnik
,
Swaroop Ghosh
,
Manoj B. Lal
,
Nick Lindert
,
Mesut Meterelliyoz
,
Randy B. Osborne
,
Joodong Park
,
Shigeki Tomishima
,
Yih Wang
,
Kevin Zhang
13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology.
ISSCC
(2014)
Mesut Meterelliyoz
,
Fuad H. Al-amoody
,
Umut Arslan
,
Fatih Hamzaoglu
,
Luke Hood
,
Manoj B. Lal
,
Jeffrey L. Miller
,
Anand Ramasundar
,
Dan Soltman
,
Ifar Wan
,
Yih Wang
,
Kevin Zhang
generation embedded DRAM with 4X lower self refresh power in 22nm Tri-Gate CMOS technology.
VLSIC
(2014)
Eric Karl
,
Yih Wang
,
Yong-Gee Ng
,
Zheng Guo
,
Fatih Hamzaoglu
,
Mesut Meterelliyoz
,
John Keane
,
Uddalak Bhattacharya
,
Kevin Zhang
,
Kaizad Mistry
,
Mark Bohr
A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry.
IEEE J. Solid State Circuits
48 (1) (2013)
Eric Karl
,
Yih Wang
,
Yong-Gee Ng
,
Zheng Guo
,
Fatih Hamzaoglu
,
Uddalak Bhattacharya
,
Kevin Zhang
,
Kaizad Mistry
,
Mark Bohr
A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active VMIN-enhancing assist circuitry.
ISSCC
(2012)
Pramod Kolar
,
Eric Karl
,
Uddalak Bhattacharya
,
Fatih Hamzaoglu
,
Henry Nho
,
Yong-Gee Ng
,
Yih Wang
,
Kevin Zhang
A 32 nm High-k Metal Gate SRAM With Adaptive Dynamic Stability Enhancement for Low-Voltage Operation.
IEEE J. Solid State Circuits
46 (1) (2011)
Fatih Hamzaoglu
,
Yih Wang
,
Pramod Kolar
,
Liqiong Wei
,
Yong-Gee Ng
,
Uddalak Bhattacharya
,
Kevin Zhang
Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design.
IEEE Des. Test Comput.
28 (1) (2011)
Yih Wang
,
Uddalak Bhattacharya
,
Fatih Hamzaoglu
,
Pramod Kolar
,
Yong-Gee Ng
,
Liqiong Wei
,
Ying Zhang
,
Kevin Zhang
,
Mark Bohr
A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management.
IEEE J. Solid State Circuits
45 (1) (2010)
Hyunwoo Nho
,
Pramod Kolar
,
Fatih Hamzaoglu
,
Yih Wang
,
Eric Karl
,
Yong-Gee Ng
,
Uddalak Bhattacharya
,
Kevin Zhang
A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation.
ISSCC
(2010)
Muhammad M. Khellah
,
Nam-Sung Kim
,
Yibin Ye
,
Dinesh Somasekhar
,
Tanay Karnik
,
Nitin Borkar
,
Gunjan Pandya
,
Fatih Hamzaoglu
,
Tom Coan
,
Yih Wang
,
Kevin Zhang
,
Clair Webb
,
Vivek De
Process, Temperature, and Supply-Noise Tolerant 45nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits.
IEEE J. Solid State Circuits
44 (4) (2009)
Fatih Hamzaoglu
,
Kevin Zhang
,
Yih Wang
,
Hong Jo Ahn
,
Uddalak Bhattacharya
,
Zhanping Chen
,
Yong-Gee Ng
,
Andrei Pavlov
,
Ken Smits
,
Mark Bohr
A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology.
IEEE J. Solid State Circuits
44 (1) (2009)
Yih Wang
,
Uddalak Bhattacharya
,
Fatih Hamzaoglu
,
Pramod Kolar
,
Yong-Gee Ng
,
Liqiong Wei
,
Ying Zhang
,
Kevin Zhang
,
Mark Bohr
A 4.0 GHz 291Mb voltage-scalable SRAM design in 32nm high-κ metal-gate CMOS with integrated power management.
ISSCC
(2009)
Yih Wang
,
Hong Jo Ahn
,
Uddalak Bhattacharya
,
Zhanping Chen
,
Tom Coan
,
Fatih Hamzaoglu
,
Walid M. Hafez
,
Chia-Hong Jan
,
Pramod Kolar
,
Sarvesh H. Kulkarni
,
Jie-Feng Lin
,
Yong-Gee Ng
,
Ian Post
,
Liqiong Wei
,
Ying Zhang
,
Kevin Zhang
,
Mark Bohr
A 1.1 GHz 12 µA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications.
IEEE J. Solid State Circuits
43 (1) (2008)
Fatih Hamzaoglu
,
Kevin Zhang
,
Yih Wang
,
Hong Jo Ahn
,
Uddalak Bhattacharya
,
Zhanping Chen
,
Yong-Gee Ng
,
Andrei Pavlov
,
Ken Smits
,
Mark Bohr
A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-Κ Metal-Gate CMOS Technology.
ISSCC
(2008)
Yih Wang
,
Hong Jo Ahn
,
Uddalak Bhattacharya
,
Tom Coan
,
Fatih Hamzaoglu
,
Walid M. Hafez
,
Chia-Hong Jan
,
Pramod Kolar
,
Sarvesh H. Kulkarni
,
Jie-Feng Lin
,
Yong-Gee Ng
,
Ian Post
,
Liqiong Wei
,
Yih Zhang
,
Kevin Zhang
,
Mark Bohr
A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications.
ISSCC
(2007)
Kevin Zhang
,
Uddalak Bhattacharya
,
Zhanping Chen
,
Fatih Hamzaoglu
,
Daniel Murray
,
Narendra Vallepalli
,
Yih Wang
,
Bo Zheng
,
Mark Bohr
A 3-GHz 70-mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply.
IEEE J. Solid State Circuits
41 (1) (2006)
Kevin Zhang
,
Uddalak Bhattacharya
,
Zhanping Chen
,
Fatih Hamzaoglu
,
Daniel Murray
,
Narendra Vallepalli
,
Yih Wang
,
Bo Zheng
,
Mark Bohr
SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction.
IEEE J. Solid State Circuits
40 (4) (2005)