A 135.6Tbps/W 2R2W SRAM with 12T Logic Bit-cell with Vmin Down to 335mV Targeted for Machine-Learning Applications in 6nm FinFET CMOS Technology.
Nail Etkin Can AkkayaGary ChanHung-Jen LiaoYih WangJonathan ChangPublished in: VLSI Technology and Circuits (2022)
Keyphrases
- cmos technology
- random access memory
- low voltage
- machine learning
- embedded dram
- flip flops
- spl times
- low power
- power consumption
- parallel processing
- design considerations
- power dissipation
- dynamic random access memory
- high speed
- leakage current
- pattern recognition
- mixed signal
- silicon on insulator
- image sensor
- motion vectors
- power reduction
- machine vision
- main memory
- low cost
- moving objects