Sarvesh H. Kulkarni

Publication Activity (10 Years)

Years Active: 2003-2017
Publications (10 Years): 2

Top Topics

Chemical Vapor Deposition

Close Proximity

Top Venues

IEEE J. Solid State Circuits

Publications

Zhanping Chen, Sarvesh H. Kulkarni, Vincent E. Dorgan, Salil Manohar Rajarshi, Lei Jiang, Uddalak Bhattacharya
1T1R Bit Cell in 14-nm High-Density Metal Fuse Technology for High-Volume Manufacturing and In-Field Programming. IEEE J. Solid State Circuits 52 (4) (2017)
Sarvesh H. Kulkarni, Zhanping Chen, Balaji Srinivasan, M. Brian Pedersen, Uddalak Bhattacharya, Kevin Zhang
A High-Density Metal-Fuse Technology Featuring a 1.6 V Programmable Low-Voltage Bit Cell With Integrated 1 V Charge Pumps in 22 nm Tri-Gate CMOS. IEEE J. Solid State Circuits 51 (4) (2016)
Sarvesh H. Kulkarni, Zhanping Chen, Jun He, Lei Jiang, M. Brian Pedersen, Kevin Zhang
Bit Cell in 32 nm High-k Metal-Gate CMOS. IEEE J. Solid State Circuits 45 (4) (2010)
Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Tom Coan, Fatih Hamzaoglu, Walid M. Hafez, Chia-Hong Jan, Pramod Kolar, Sarvesh H. Kulkarni, Jie-Feng Lin, Yong-Gee Ng, Ian Post, Liqiong Wei, Ying Zhang, Kevin Zhang, Mark Bohr
A 1.1 GHz 12 µA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications. IEEE J. Solid State Circuits 43 (1) (2008)
Sarvesh H. Kulkarni, Dennis Sylvester, David T. Blaauw
Design-Time Optimization of Post-Silicon Tuned Circuits Using Adaptive Body Bias. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (3) (2008)
Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Tom Coan, Fatih Hamzaoglu, Walid M. Hafez, Chia-Hong Jan, Pramod Kolar, Sarvesh H. Kulkarni, Jie-Feng Lin, Yong-Gee Ng, Ian Post, Liqiong Wei, Yih Zhang, Kevin Zhang, Mark Bohr
A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications. ISSCC (2007)
Sarvesh H. Kulkarni, Dennis Sylvester
Power Distribution Techniques for Dual VDD Circuits. J. Low Power Electron. 2 (2) (2006)
Sarvesh H. Kulkarni, Dennis Sylvester, David T. Blaauw
A statistical framework for post-silicon tuning through body bias clustering. ICCAD (2006)
Sarvesh H. Kulkarni, Dennis Sylvester
Power distribution techniques for dual VDD circuits. ASP-DAC (2006)
Sarvesh H. Kulkarni, Ashish Srivastava, Dennis Sylvester
A new algorithm for improved VDD assignment in low power dual VDD systems. ISLPED (2004)
Sarvesh H. Kulkarni, Dennis Sylvester
design. IEEE Trans. Very Large Scale Integr. Syst. 12 (9) (2004)
Robert Bai, Sarvesh H. Kulkarni, Wesley Kwong, Ashish Srivastava, Dennis Sylvester, David T. Blaauw
An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages. ISVLSI (2003)
Ruchir Puri, Leon Stok, John M. Cohn, David S. Kung, David Z. Pan, Dennis Sylvester, Ashish Srivastava, Sarvesh H. Kulkarni
Pushing ASIC performance in a power envelope. DAC (2003)