Fatih Hamzaoglu

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 14

Top Topics

Dynamic Random Access Memory

Memory Subsystem

Top Venues

IEEE J. Solid State Circuits

Publications

Shanshan Xie, Can Ni, Aseem Sayal, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni
eDRAM-CIM: Reconfigurable Charge Domain Compute-In-Memory Design With Embedded Dynamic Random Access Memory Array Realizing Adaptive Data Converters. IEEE J. Solid State Circuits 59 (6) (2024)
Shanshan Xie, Can Ni, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni
Gain-Cell CIM: Leakage and Bitline Swing Aware 2T1C Gain-Cell eDRAM Compute in Memory Design with Bitline Precharge DACs and Compact Schmitt Trigger ADCs. VLSI Technology and Circuits (2022)
Ravi R. Iyer, Vivek De, Ramesh Illikkal, David A. Koufaty, Bhushan Chitlur, Andrew Herdrich, Muhammad M. Khellah, Fatih Hamzaoglu, Eric Karl
Advances in Microprocessor Cache Architectures Over the Last 25 Years. IEEE Micro 41 (6) (2021)
Shanshan Xie, Can Ni, Aseem Sayal, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni
16.2 eDRAM-CIM: Compute-In-Memory Design with Reconfigurable Embedded-Dynamic-Memory Array Realizing Adaptive Data Converters and Charge-Domain Computing. ISSCC (2021)
Pulkit Jain, Umut Arslan, Meenakshi Sekhar, Blake C. Lin, Liqiong Wei, Tanaya Sahu, Juan Alzate-vinasco, Ajay Vangapaty, Mesut Meterelliyoz, Nathan Strutt, Albert B. Chen, Patrick Hentges, Pedro A. Quintero, Chris Connor, Oleg Golonzka, Kevin Fischer, Fatih Hamzaoglu
Embedded Non-Volatile ReRAM Macro in 22nm FinFET Technology with Adaptive Forming/Set/Reset Schemes Yielding Down to 0.5V with Sensing Time of 5ns at 0.7V. ISSCC (2019)
Fatih Hamzaoglu
Embedded Memories for Silicon-In-Package: Optimization of Memory Subsystem from IoT to Machine Learning. VLSI-DAT (2019)
James A. O'Donnell, Chris Connor, Tanmoy Pramanik, Jeff Hicks, Juan G. Alzate, Fatih Hamzaoglu, Justin Brockman, Oleg Golonzka, Kevin Fischer
eNVM MRAM Retention Reliability Modeling in 22FFL FinFET Technology. IRPS (2019)
Liqiong Wei, Juan G. Alzate, Umut Arslan, Justin Brockman, Nilanjan Das, Kevin Fischer, Tahir Ghani, Oleg Golonzka, Patrick Hentges, Rawshan Jahan, Pulkit Jain, Blake C. Lin, Mesut Meterelliyoz, Jim O'Donnell, Conor Puls, Pedro A. Quintero, Tanaya Sahu, Meenakshi Sekhar, Ajay Vangapaty, Chris Wiegand, Fatih Hamzaoglu
A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing Technique. ISSCC (2019)
Naveen Verma, Fatih Hamzaoglu, Makoto Nagata, Leland Chang
Session 31 overview: Computation in memory for machine learning: Technology directions and memory subcommittees. ISSCC (2018)
Avishek Biswas, Umut Arslan, Fatih Hamzaoglu, Anantha P. Chandrakasan
An offset-cancelling four-phase voltage sense amplifier for resistive memories in 14nm CMOS. CICC (2017)
Fatih Hamzaoglu, Chun Shiah, Leland Chang
Session 12 overview: SRAM. ISSCC (2017)
Fatih Hamzaoglu, Takashi Kono
Session 7 overview: Non-volatile memory solutions: Memory subcommittee. ISSCC (2015)
Jonathan Chang, Leland Chang, Antoine Dupret, Chulwoo Kim, Fatih Hamzaoglu, Takefumi Yoshikawa
F2: Memory trends: From big data to wearable devices. ISSCC (2015)
Fatih Hamzaoglu, Umut Arslan, Nabhendra Bisnik, Swaroop Ghosh, Manoj B. Lal, Nick Lindert, Mesut Meterelliyoz, Randy B. Osborne, Joodong Park, Shigeki Tomishima, Yih Wang, Kevin Zhang
A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology. IEEE J. Solid State Circuits 50 (1) (2015)
Fatih Hamzaoglu, Umut Arslan, Nabhendra Bisnik, Swaroop Ghosh, Manoj B. Lal, Nick Lindert, Mesut Meterelliyoz, Randy B. Osborne, Joodong Park, Shigeki Tomishima, Yih Wang, Kevin Zhang
13.1 A 1Gb 2GHz embedded DRAM in 22nm tri-gate CMOS technology. ISSCC (2014)
Mesut Meterelliyoz, Fuad H. Al-amoody, Umut Arslan, Fatih Hamzaoglu, Luke Hood, Manoj B. Lal, Jeffrey L. Miller, Anand Ramasundar, Dan Soltman, Ifar Wan, Yih Wang, Kevin Zhang
generation embedded DRAM with 4X lower self refresh power in 22nm Tri-Gate CMOS technology. VLSIC (2014)
Eric Karl, Yih Wang, Yong-Gee Ng, Zheng Guo, Fatih Hamzaoglu, Mesut Meterelliyoz, John Keane, Uddalak Bhattacharya, Kevin Zhang, Kaizad Mistry, Mark Bohr
A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry. IEEE J. Solid State Circuits 48 (1) (2013)
Eric Karl, Yih Wang, Yong-Gee Ng, Zheng Guo, Fatih Hamzaoglu, Uddalak Bhattacharya, Kevin Zhang, Kaizad Mistry, Mark Bohr
A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active VMIN-enhancing assist circuitry. ISSCC (2012)
Pramod Kolar, Eric Karl, Uddalak Bhattacharya, Fatih Hamzaoglu, Henry Nho, Yong-Gee Ng, Yih Wang, Kevin Zhang
A 32 nm High-k Metal Gate SRAM With Adaptive Dynamic Stability Enhancement for Low-Voltage Operation. IEEE J. Solid State Circuits 46 (1) (2011)
Fatih Hamzaoglu, Yih Wang, Pramod Kolar, Liqiong Wei, Yong-Gee Ng, Uddalak Bhattacharya, Kevin Zhang
Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design. IEEE Des. Test Comput. 28 (1) (2011)
Dinesh Somasekhar, Balaji Srinivasan, Gunjan Pandya, Fatih Hamzaoglu, Muhammad M. Khellah, Tanay Karnik, Kevin Zhang
Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process. IEEE J. Solid State Circuits 45 (4) (2010)
Yih Wang, Uddalak Bhattacharya, Fatih Hamzaoglu, Pramod Kolar, Yong-Gee Ng, Liqiong Wei, Ying Zhang, Kevin Zhang, Mark Bohr
A 4.0 GHz 291 Mb Voltage-Scalable SRAM Design in a 32 nm High-k + Metal-Gate CMOS Technology With Integrated Power Management. IEEE J. Solid State Circuits 45 (1) (2010)
Hyunwoo Nho, Pramod Kolar, Fatih Hamzaoglu, Yih Wang, Eric Karl, Yong-Gee Ng, Uddalak Bhattacharya, Kevin Zhang
A 32nm High-k metal gate SRAM with adaptive dynamic stability enhancement for low-voltage operation. ISSCC (2010)
Muhammad M. Khellah, Nam-Sung Kim, Yibin Ye, Dinesh Somasekhar, Tanay Karnik, Nitin Borkar, Gunjan Pandya, Fatih Hamzaoglu, Tom Coan, Yih Wang, Kevin Zhang, Clair Webb, Vivek De
Process, Temperature, and Supply-Noise Tolerant 45nm Dense Cache Arrays With Diffusion-Notch-Free (DNF) 6T SRAM Cells and Dynamic Multi-Vcc Circuits. IEEE J. Solid State Circuits 44 (4) (2009)
Fatih Hamzaoglu, Kevin Zhang, Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Yong-Gee Ng, Andrei Pavlov, Ken Smits, Mark Bohr
A 3.8 GHz 153 Mb SRAM Design With Dynamic Stability Enhancement and Leakage Reduction in 45 nm High-k Metal Gate CMOS Technology. IEEE J. Solid State Circuits 44 (1) (2009)
Yih Wang, Uddalak Bhattacharya, Fatih Hamzaoglu, Pramod Kolar, Yong-Gee Ng, Liqiong Wei, Ying Zhang, Kevin Zhang, Mark Bohr
A 4.0 GHz 291Mb voltage-scalable SRAM design in 32nm high-κ metal-gate CMOS with integrated power management. ISSCC (2009)
Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Tom Coan, Fatih Hamzaoglu, Walid M. Hafez, Chia-Hong Jan, Pramod Kolar, Sarvesh H. Kulkarni, Jie-Feng Lin, Yong-Gee Ng, Ian Post, Liqiong Wei, Ying Zhang, Kevin Zhang, Mark Bohr
A 1.1 GHz 12 µA/Mb-Leakage SRAM Design in 65 nm Ultra-Low-Power CMOS Technology With Integrated Leakage Reduction for Mobile Applications. IEEE J. Solid State Circuits 43 (1) (2008)
Fatih Hamzaoglu, Kevin Zhang, Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Zhanping Chen, Yong-Gee Ng, Andrei Pavlov, Ken Smits, Mark Bohr
A 153Mb-SRAM Design with Dynamic Stability Enhancement and Leakage Reduction in 45nm High-Κ Metal-Gate CMOS Technology. ISSCC (2008)
Yih Wang, Hong Jo Ahn, Uddalak Bhattacharya, Tom Coan, Fatih Hamzaoglu, Walid M. Hafez, Chia-Hong Jan, Pramod Kolar, Sarvesh H. Kulkarni, Jie-Feng Lin, Yong-Gee Ng, Ian Post, Liqiong Wei, Yih Zhang, Kevin Zhang, Mark Bohr
A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications. ISSCC (2007)
Muhammad M. Khellah, Dinesh Somasekhar, Yibin Ye, Nam-Sung Kim, Jason Howard, Gregory Ruhl, Murad Sunna, James W. Tschanz, Nitin Borkar, Fatih Hamzaoglu, Gunjan Pandya, Ali Farhang, Kevin Zhang, Vivek De
SRAM Building Block in 65-nm CMOS Process With Actively Clamped Sleep Transistor. IEEE J. Solid State Circuits 42 (1) (2007)
Muhammad M. Khellah, Nam-Sung Kim, Jason Howard, Gregory Ruhl, Yibin Ye, James W. Tschanz, Dinesh Somasekhar, Nitin Borkar, Fatih Hamzaoglu, Gunjan Pandya, Ali Farhang, Kevin Zhang, Vivek De
SRAM Building Block in 65nm CMOS. ISSCC (2006)
Kevin Zhang, Uddalak Bhattacharya, Zhanping Chen, Fatih Hamzaoglu, Daniel Murray, Narendra Vallepalli, Yih Wang, Bo Zheng, Mark Bohr
A 3-GHz 70-mb SRAM in 65-nm CMOS technology with integrated column-based dynamic power supply. IEEE J. Solid State Circuits 41 (1) (2006)
Kevin Zhang, Uddalak Bhattacharya, Zhanping Chen, Fatih Hamzaoglu, Daniel Murray, Narendra Vallepalli, Yih Wang, Bo Zheng, Mark Bohr
SRAM design on 65-nm CMOS technology with dynamic sleep transistor for leakage reduction. IEEE J. Solid State Circuits 40 (4) (2005)
Mircea R. Stan, Fatih Hamzaoglu, David Garrett
Non-Manhattan maze routing. SBCCI (2004)
Fatih Hamzaoglu, Yibin Ye, Ali Keshavarzi, Kevin Zhang, Siva G. Narendra, Shekhar Borkar, Mircea R. Stan, Vivek De
SRAM cells with full-swing single-ended bit line sensing for on-chip cache. IEEE Trans. Very Large Scale Integr. Syst. 10 (2) (2002)
Fatih Hamzaoglu, Mircea R. Stan
Circuit-level techniques to control gate leakage for sub-100nm CMOS. ISLPED (2002)