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A 4.6GHz 162Mb SRAM design in 22nm tri-gate CMOS technology with integrated active VMIN-enhancing assist circuitry.
Eric Karl
Yih Wang
Yong-Gee Ng
Zheng Guo
Fatih Hamzaoglu
Uddalak Bhattacharya
Kevin Zhang
Kaizad Mistry
Mark Bohr
Published in:
ISSCC (2012)
Keyphrases
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cmos technology
low power
power consumption
spl times
low voltage
power dissipation
parallel processing
high speed
image sensor
mixed signal
low cost
clock frequency
leakage current
case study
power reduction
dynamic range
image sequences