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Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design.
Fatih Hamzaoglu
Yih Wang
Pramod Kolar
Liqiong Wei
Yong-Gee Ng
Uddalak Bhattacharya
Kevin Zhang
Published in:
IEEE Des. Test Comput. (2011)
Keyphrases
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electronic circuits
information systems
high speed
power consumption
evolvable hardware
shift register
case study
circuit design
power reduction
nm technology
low cost
design process
parallel processing
design principles
low voltage