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A 4.6 GHz 162 Mb SRAM Design in 22 nm Tri-Gate CMOS Technology With Integrated Read and Write Assist Circuitry.

Eric KarlYih WangYong-Gee NgZheng GuoFatih HamzaogluMesut MeterelliyozJohn KeaneUddalak BhattacharyaKevin ZhangKaizad MistryMark Bohr
Published in: IEEE J. Solid State Circuits (2013)
Keyphrases
  • cmos technology
  • low power
  • power consumption
  • spl times
  • power dissipation
  • parallel processing
  • high speed
  • low voltage
  • image sensor
  • nm technology
  • mixed signal
  • low cost
  • random access
  • power reduction
  • embedded dram