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Aseem Sayal
ORCID
Publication Activity (10 Years)
Years Active: 2019-2024
Publications (10 Years): 7
Top Topics
Encryption Decryption
Energy Efficient
Power Management
Dynamic Random Access Memory
Top Venues
IEEE J. Solid State Circuits
ISSCC
CICC
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
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Publications
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Shanshan Xie
,
Can Ni
,
Aseem Sayal
,
Pulkit Jain
,
Fatih Hamzaoglu
,
Jaydeep P. Kulkarni
eDRAM-CIM: Reconfigurable Charge Domain Compute-In-Memory Design With Embedded Dynamic Random Access Memory Array Realizing Adaptive Data Converters.
IEEE J. Solid State Circuits
59 (6) (2024)
Shanshan Xie
,
Can Ni
,
Aseem Sayal
,
Pulkit Jain
,
Fatih Hamzaoglu
,
Jaydeep P. Kulkarni
16.2 eDRAM-CIM: Compute-In-Memory Design with Reconfigurable Embedded-Dynamic-Memory Array Realizing Adaptive Data Converters and Charge-Domain Computing.
ISSCC
(2021)
Aseem Sayal
,
Shirin Fathima
,
S. S. Teja Nibhanupudi
,
Jaydeep P. Kulkarni
COMPAC: Compressed Time-Domain, Pooling-Aware Convolution CNN Engine With Reduced Data Movement for Energy-Efficient AI Computing.
IEEE J. Solid State Circuits
56 (7) (2021)
Meizhi Wang
,
Shanshan Xie
,
Ping Na Li
,
Aseem Sayal
,
Ge Li
,
Vishnuvardhan V. Iyer
,
Aditya Thimmaiah
,
Michael Orshansky
,
Ali E. Yilmaz
,
Jaydeep P. Kulkarni
Galvanically Isolated, Power and Electromagnetic Side-Channel Attack Resilient Secure AES Core with Integrated Charge Pump based Power Management.
CICC
(2021)
Aseem Sayal
,
S. S. Teja Nibhanupudi
,
Shirin Fathima
,
Jaydeep P. Kulkarni
A 12.08-TOPS/W All-Digital Time-Domain CNN Engine Using Bi-Directional Memory Delay Lines for Energy Efficient Edge Computing.
IEEE J. Solid State Circuits
55 (1) (2020)
Aseem Sayal
,
Paras Ajay
,
Mark W. McDermott
,
S. V. Sreenivasan
,
Jaydeep P. Kulkarni
M2A2: Microscale Modular Assembled ASICs for High-Mix, Low-Volume, Heterogeneously Integrated Designs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.
39 (12) (2020)
Aseem Sayal
,
Shirin Fathima
,
S. S. Teja Nibhanupudi
,
Jaydeep P. Kulkarni
All-Digital Time-Domain CNN Engine Using Bidirectional Memory Delay Lines for Energy-Efficient Edge Computing.
ISSCC
(2019)