Pulkit Jain

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 8

Top Topics

Health Monitoring

Dynamic Random Access Memory

Top Venues

VLSI Technology and Circuits

Publications

Shanshan Xie, Can Ni, Aseem Sayal, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni
eDRAM-CIM: Reconfigurable Charge Domain Compute-In-Memory Design With Embedded Dynamic Random Access Memory Array Realizing Adaptive Data Converters. IEEE J. Solid State Circuits 59 (6) (2024)
Harshit Gujral, Abhinav Sharma, Pulkit Jain, Shriya Juneja, Sangeeta Mittal
Design and Implementation of a Quantitative Network Health Monitoring and Recovery System. Wirel. Pers. Commun. 125 (1) (2022)
Shanshan Xie, Can Ni, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni
Gain-Cell CIM: Leakage and Bitline Swing Aware 2T1C Gain-Cell eDRAM Compute in Memory Design with Bitline Precharge DACs and Compact Schmitt Trigger ADCs. VLSI Technology and Circuits (2022)
Manuel Ntumba, Saurabh Gore, Pulkit Jain, Jean-Baptiste Awanyo
GNC Analysis and Robotic Systems Configuration of Collision-free Earth Observation Satellites (CfEOS) Constellations. CoRR (2021)
Shanshan Xie, Can Ni, Aseem Sayal, Pulkit Jain, Fatih Hamzaoglu, Jaydeep P. Kulkarni
16.2 eDRAM-CIM: Compute-In-Memory Design with Reconfigurable Embedded-Dynamic-Memory Array Realizing Adaptive Data Converters and Charge-Domain Computing. ISSCC (2021)
Som Sekhar Bhattacharyya, Sumi Jha, Shubham Khandelwal, Pulkit Jain, Anshul Ekka
Development of a Model for Review Sharing in the Context of Mobile Phone Purchase Amongst Indian Millennials. Int. J. Asian Bus. Inf. Manag. 12 (2) (2021)
Pulkit Jain, Umut Arslan, Meenakshi Sekhar, Blake C. Lin, Liqiong Wei, Tanaya Sahu, Juan Alzate-vinasco, Ajay Vangapaty, Mesut Meterelliyoz, Nathan Strutt, Albert B. Chen, Patrick Hentges, Pedro A. Quintero, Chris Connor, Oleg Golonzka, Kevin Fischer, Fatih Hamzaoglu
Embedded Non-Volatile ReRAM Macro in 22nm FinFET Technology with Adaptive Forming/Set/Reset Schemes Yielding Down to 0.5V with Sensing Time of 5ns at 0.7V. ISSCC (2019)
Liqiong Wei, Juan G. Alzate, Umut Arslan, Justin Brockman, Nilanjan Das, Kevin Fischer, Tahir Ghani, Oleg Golonzka, Patrick Hentges, Rawshan Jahan, Pulkit Jain, Blake C. Lin, Mesut Meterelliyoz, Jim O'Donnell, Conor Puls, Pedro A. Quintero, Tanaya Sahu, Meenakshi Sekhar, Ajay Vangapaty, Chris Wiegand, Fatih Hamzaoglu
A 7Mb STT-MRAM in 22FFL FinFET Technology with 4ns Read Sensing Time at 0.9V Using Write-Verify-Write Scheme and Offset-Cancellation Sensing Technique. ISSCC (2019)
Xiaofei Wang, Qianying Tang, Pulkit Jain, Dong Jiao, Chris H. Kim
The Dependence of BTI and HCI-Induced Frequency Degradation on Interconnect Length and Its Circuit Level Implications. IEEE Trans. Very Large Scale Integr. Syst. 23 (2) (2015)
Xiaofei Wang, John Keane, Tony Tae-Hyoung Kim, Pulkit Jain, Qianying Tang, Chris H. Kim
Silicon Odometers: Compact In Situ Aging Sensors for Robust System Design. IEEE Micro 34 (6) (2014)
Ki Chul Chun, Wei Zhang, Pulkit Jain, Chris H. Kim
A 2T1C Embedded DRAM Macro With No Boosted Supplies Featuring a 7T SRAM Based Repair and a Cell Storage Monitor. IEEE J. Solid State Circuits 47 (10) (2012)
Pulkit Jain, John Keane, Chris H. Kim
An array-based Chip Lifetime Predictor macro for gate dielectric failures in core and IO FETs. ESSDERC (2012)
Ki Chul Chun, Pulkit Jain, Tae-Ho Kim, Chris H. Kim
A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches. IEEE J. Solid State Circuits 47 (2) (2012)
Ki Chul Chun, Wei Zhang, Pulkit Jain, Chris H. Kim
A 700MHz 2T1C embedded DRAM macro in a generic logic process with no boosted supplies. ISSCC (2011)
Ki Chul Chun, Pulkit Jain, Jung Hwa Lee, Chris H. Kim
A 3T Gain Cell Embedded DRAM Utilizing Preferential Boosting for High Density and Low Power On-Die Caches. IEEE J. Solid State Circuits 46 (6) (2011)
Ki Chul Chun, Pulkit Jain, Chris H. Kim
Logic-compatible embedded DRAM design for memory intensive low power systems. ISCAS (2010)
Ki Chul Chun, Pulkit Jain, Chris H. Kim
A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention time and 53% less static power than a power-gated SRAM. ISLPED (2009)
Dong Jiao, Jie Gu, Pulkit Jain, Chris H. Kim
using phase-shifted clock distribution. ISLPED (2008)
Pulkit Jain, Tony Tae-Hyoung Kim, John Keane, Chris H. Kim
A multi-story power delivery technique for 3D integrated circuits. ISLPED (2008)