Chris H. Kim

ORCID

Publication Activity (10 Years)

Years Active: 2002-2023
Publications (10 Years): 72

Top Venues

CICC

IEEE J. Solid State Circuits

IRPS

ISCAS

Publications

Armen Kteyan, Valeriy Sukharev, Alexander Volkov, Jun-Ho Choy, Farid N. Najm, Yong Hyeon Yi, Chris H. Kim, Stéphane Moreau
Electromigration Assessment in Power Grids with Account of Redundancy and Non-Uniform Temperature Distribution. ISPD (2023)
M. Hüsrev Cilasun, Ziqing Zeng, Ramprasath S, Abhimanyu Kumar, Hao Lo, William Cho, Chris H. Kim, Ulya R. Karpuzcu, Sachin S. Sapatnekar
3SAT on an All-to-All-Connected CMOS Ising Solver Chip. CoRR (2023)
Yong Hyeon Yi, Chris H. Kim, Chen Zhou, Armen Kteyan, Valeriy Sukharev
Studying the Impact of Temperature Gradient on Electromigration Lifetime Using a Power Grid Test Structure with On-Chip Heaters. IRPS (2023)
Minsu Kim, Muqing Liu, Luke R. Everson, Chris H. Kim
An Embedded nand Flash-Based Compute-In-Memory Array Demonstrated in a Standard Logic Process. IEEE J. Solid State Circuits 57 (2) (2022)
S. Karen Khatamifard, Zamshed I. Chowdhury, Nakul Pande, Meisam Razaviyayn, Chris H. Kim, Ulya R. Karpuzcu
GeNVoM: Read Mapping Near Non-Volatile Memory. IEEE ACM Trans. Comput. Biol. Bioinform. 19 (6) (2022)
Po-Wei Chiu, Chris H. Kim
A 32Gb/s Time-Based PAM-4 Transceiver for High-Speed DRAM Interfaces With In-Situ Channel Loss and Bit-Error-Rate Monitors. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (5) (2022)
Valeriy Sukharev, Armen Kteyan, Farid N. Najm, Yong Hyeon Yi, Chris H. Kim, Jun-Ho Choy, Sofya Torosyan, Yu Zhu
Experimental Validation of a Novel Methodology for Electromigration Assessment in On-Chip Power Grids. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Tahmida Islam, Junkyu Kim, Chris H. Kim, David Tipple, Michael Nelson, Robert Jin, Anis Jarrar
A Calibration-Free Synthesizable Odometer Featuring Automatic Frequency Dead Zone Escape and Start-up Glitch Removal. IRPS (2022)
Sriram R. Vangal, Somnath Paul, Steven Hsu, Amit Agarwal, Saurabh Kumar, Ram Krishnamurthy, Harish Krishnamurthy, James W. Tschanz, Vivek De, Chris H. Kim
Wide-Range Many-Core SoC Design in Scaled CMOS: Challenges and Opportunities. IEEE Trans. Very Large Scale Integr. Syst. 29 (5) (2021)
Gyusung Park, Hanzhao Yu, Minsu Kim, Chris H. Kim
An All BTI (N-PBTI, N-NBTI, P-PBTI, P-NBTI) Odometer based on a Dual Power Rail Ring Oscillator Array. IRPS (2021)
Luke R. Everson, Sachin S. Sapatnekar, Chris H. Kim
A Time-Based Intra-Memory Computing Graph Processor Featuring A* Wavefront Expansion and 2-D Gradient Control. IEEE J. Solid State Circuits 56 (7) (2021)
Hanzhao Yu, Gyusung Park, Chris H. Kim
Extreme Temperature Characterization of Amplifier Response up to 300 Degrees Celsius Using Integrated Heaters and On-chip Samplers. ESSCIRC (2021)
Saurabh Kumar, Minki Cho, Luke R. Everson, Andres Malavasi, Dan Lake, Carlos Tokunaga, Muhammad M. Khellah, James W. Tschanz, Vivek De, Chris H. Kim
A Back-Sampling Chain Technique for Accelerated Detection, Characterization, and Reconstruction of Radiation-Induced Transient Pulses. IEEE Trans. Very Large Scale Integr. Syst. 29 (12) (2021)
Ibrahim Ahmed, Po-Wei Chiu, William Moy, Chris H. Kim
A Probabilistic Compute Fabric Based on Coupled Ring Oscillators for Solving Combinatorial Optimization Problems. IEEE J. Solid State Circuits 56 (9) (2021)
Ibrahim Ahmed, Po-Wei Chiu, Chris H. Kim
A Probabilistic Self-Annealing Compute Fabric Based on 560 Hexagonally Coupled Ring Oscillators for Solving Combinatorial Optimization Problems. VLSI Circuits (2020)
Po-Wei Chiu, Chris H. Kim
22.4 A 32Gb/s Digital-Intensive Single-Ended PAM-4 Transceiver for High-Speed Memory Interfaces Featuring a 2-Tap Time-Based Decision Feedback Equalizer and an In-Situ Channel-Loss Monitor. ISSCC (2020)
Minsu Kim, Jeehwan Song, Chris H. Kim
Reliability Characterization of Logic-Compatible NAND Flash Memory based Synapses with 3-bit per Cell Weights and 1μA Current Steps. IRPS (2020)
Nakul Pande, Gyusung Park, Chris H. Kim, Srikanth Krishnan, Vijay Reddy
Investigating the Aging Dynamics of Diode-Connected MOS Devices Using an Array-Based Characterization Vehicle in a 65nm Process. IRPS (2019)
Dwaipayan Biswas, Luke R. Everson, Muqing Liu, Madhuri Panwar, Bram-Ernst Verhoef, Shrishail Patki, Chris H. Kim, Amit Acharyya, Chris Van Hoof, Mario Konijnenburg, Nick Van Helleputte
CorNET: Deep Learning Framework for PPG-Based Heart Rate Estimation and Biometric Identification in Ambulant Environment. IEEE Trans. Biomed. Circuits Syst. 13 (2) (2019)
Luke R. Everson, Muqing Liu, Nakul Pande, Chris H. Kim
An Energy-Efficient One-Shot Time-Based Neural Network Accelerator Employing Dynamic Threshold Error Correction in 65 nm. IEEE J. Solid State Circuits 54 (10) (2019)
Gyusung Park, Minsu Kim, Nakul Pande, Po-Wei Chiu, Jeehwan Song, Chris H. Kim
A Counter based ADC Non-linearity Measurement Circuit and Its Application to Reliability Testing. CICC (2019)
Somnath Kundu, Muqing Liu, Shi-Jie Wen, Richard Wong, Chris H. Kim
A Fully Integrated Digital LDO With Built-In Adaptive Sampling and Active Voltage Positioning Using a Beat-Frequency Quantizer. IEEE J. Solid State Circuits 54 (1) (2019)
Luke R. Everson, Dwaipayan Biswas, Bram-Ernst Verhoef, Chris H. Kim, Chris Van Hoof, Mario Konijnenburg, Nick Van Helleputte
BioTranslator: Inferring R-Peaks from Ambulatory Wrist-Worn PPG Signal. EMBC (2019)
Leandro Mateus Giacomini Rocha, Nick Van Helleputte, Muqing Liu, Dwaipayan Biswas, Bram-Ernst Verhoef, Sergio Bampi, Chris H. Kim, Chris Van Hoof, Mario Konijnenburg, Marian Verhelst
Real-time HR Estimation from wrist PPG using Binary LSTMs. BioCAS (2019)
Luke R. Everson, Sachin S. Sapatnekar, Chris H. Kim
A 40×40 Four-Neighbor Time-Based In-Memory Computing Graph ASIC Chip Featuring Wavefront Expansion and 2D Gradient Control. ISSCC (2019)
Ramtin Zand, Kerem Yunus Camsari, Steven D. Pyle, Ibrahim Ahmed, Chris H. Kim, Ronald F. DeMara
Low-Energy Deep Belief Networks Using Intrinsic Sigmoidal Spintronic-based Probabilistic Neurons. ACM Great Lakes Symposium on VLSI (2018)
Somnath Kundu, Muqing Liu, Richard Wong, Shi-Jie Wen, Chris H. Kim
A fully integrated 40pF output capacitor beat-frequency-quantizer-based digital LDO with built-in adaptive sampling and active voltage positioning. ISSCC (2018)
Po-Wei Chiu, Somnath Kundu, Qianying Tang, Chris H. Kim
A 65-nm 10-Gb/s 10-mm On-Chip Serial Link Featuring a Digital-Intensive Time-Based Decision Feedback Equalizer. IEEE J. Solid State Circuits 53 (4) (2018)
Luke R. Everson, Muqing Liu, Nakul Pande, Chris H. Kim
A 104.8TOPS/W One-Shot Time-Based Neuromorphic Chip Employing Dynamic Threshold Error Correction in 65nm. A-SSCC (2018)
Sandhya Koteshwara, Chris H. Kim, Keshab K. Parhi
Key-Based Dynamic Functional Obfuscation of Integrated Circuits Using Sequentially Triggered Mode-Based Design. IEEE Trans. Inf. Forensics Secur. 13 (1) (2018)
Anoop Koyily, Satya Venkata Sandeep Avvaru, Chen Zhou, Chris H. Kim, Keshab K. Parhi
Effect of aging on linear and nonlinear MUX PUFs by statistical modeling. ASP-DAC (2018)
Luke R. Everson, Somnath Kundu, Gang Chen, Zhi Yang, Timothy J. Ebner, Chris H. Kim
/Channel Time-Based Beat Frequency ADC in 65nm CMOS for Intra-Electrode Neural Recording. BioCAS (2018)
Luke R. Everson, Dwaipayan Biswas, Madhuri Panwar, Dimitrios Rodopoulos, Amit Acharyya, Chris H. Kim, Chris Van Hoof, Mario Konijnenburg, Nick Van Helleputte
BiometricNet: Deep Learning based Biometric Identification using Wrist-Worn PPG. ISCAS (2018)
Gyusung Park, Minsu Kim, Chris H. Kim, Bongjin Kim, Vijay Reddy
All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits. IRPS (2018)
Po-Wei Chiu, Muqing Liu, Qianying Tang, Chris H. Kim
A 2.1 pJ/bit, 8 Gb/s Ultra-Low Power In-Package Serial Link Featuring a Time-based Front-end and a Digital Equalizer. A-SSCC (2018)
Qianying Tang, Won Ho Choi, Luke R. Everson, Keshab K. Parhi, Chris H. Kim
A Physical Unclonable Function based on Capacitor Mismatch in a Charge-Redistribution SAR-ADC. ISCAS (2018)
Anoop Koyily, Chen Zhou, Chris H. Kim, Keshab K. Parhi
Predicting Soft-Response of MUX PUFs via Logistic Regression of Total Delay Difference. ISCAS (2018)
Yingjie Lao, Bo Yuan, Chris H. Kim, Keshab K. Parhi
Reliable PUF-Based Local Authentication With Self-Correction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (2) (2017)
Muqing Liu, Luke R. Everson, Chris H. Kim
A scalable time-based integrate-and-fire neuromorphic core with brain-inspired leak and local lateral inhibition capabilities. CICC (2017)
Jianping Wang, Sachin S. Sapatnekar, Chris H. Kim, Paul A. Crowell, Steven J. Koester, Supriyo Datta, Kaushik Roy, Anand Raghunathan, Xiaobo Sharon Hu, Michael T. Niemier, Azad Naeemi, Chia-Ling Chien, Caroline A. Ross, Roland Kawakami
A Pathway to Enable Exponential Scaling for the Beyond-CMOS Era: Invited. DAC (2017)
Qianying Tang, Chen Zhou, Woong Choi, Gyuseong Kang, Jongsun Park, Keshab K. Parhi, Chris H. Kim
Challenge Response Pairs per 1Kbit array for secure chip authentication. CICC (2017)
Qianying Tang, Chris H. Kim
Characterizing the Impact of RTN on Logic and SRAM Operation Using a Dual Ring Oscillator Array Circuit. IEEE J. Solid State Circuits 52 (6) (2017)
Robert Perricone, Ibrahim Ahmed, Zhaoxin Liang, Meghna G. Mankalale, Xiaobo Sharon Hu, Chris H. Kim, Michael T. Niemier, Sachin S. Sapatnekar, Jianping Wang
Advanced spintronic memory and logic for non-volatile processors. DATE (2017)
Sandhya Koteshwara, Chris H. Kim, Keshab K. Parhi
Hierarchical functional obfuscation of integratec circuits using a mode-based approach. ISCAS (2017)
S. V. Sandeep Avvaru, Chen Zhou, Chris H. Kim, Keshab K. Parhi
Predicting hard and soft-responses and identifying stable challenges of MUX PUFs using ANNs. MWSCAS (2017)
Somnath Kundu, Bongjin Kim, Chris H. Kim
A 0.2-1.45-GHz Subsampling Fractional-N Digital MDLL With Zero-Offset Aperture PD-Based Spur Cancellation and In Situ Static Phase Offset Detection. IEEE J. Solid State Circuits 52 (3) (2017)
Muqing Liu, Chen Zhou, Qianying Tang, Keshab K. Parhi, Chris H. Kim
A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function. ISLPED (2017)
S. Karen Khatamifard, Zamshed I. Chowdhury, Nakul Pande, Meisam Razaviyayn, Chris H. Kim, Ulya R. Karpuzcu
A Non-volatile Near-Memory Read Mapping Accelerator. CoRR (2017)
Somnath Kundu, Chris H. Kim
A multi-phase VCO quantizer based adaptive digital LDO in 65nm CMOS technology. ISCAS (2017)
Sandhya Koteshwara, Chris H. Kim, Keshab K. Parhi
Functional encryption of integrated circuits by key-based hybrid obfuscation. ACSSC (2017)
Ramtin Zand, Kerem Yunus Camsari, Ibrahim Ahmed, Steven D. Pyle, Chris H. Kim, Supriyo Datta, Ronald F. DeMara
R-DBN: A Resistive Deep Belief Network Architecture Leveraging the Intrinsic Behavior of Probabilistic Devices. CoRR (2017)
Anoop Koyily, Chen Zhou, Chris H. Kim, Keshab K. Parhi
An entropy test for determining whether a MUX PUF is linear or nonlinear. ISCAS (2017)
Chen Zhou, Keshab K. Parhi, Chris H. Kim
Secure and Reliable XOR Arbiter PUF Design: An Experimental Study based on 1 Trillion Challenge Response Pair Measurements. DAC (2017)
Yingjie Lao, Qianying Tang, Chris H. Kim, Keshab K. Parhi
Beat Frequency Detector-Based High-Speed True Random Number Generators: Statistical Modeling and Analysis. ACM J. Emerg. Technol. Comput. Syst. 13 (1) (2016)
Sandhya Koteshwara, Chris H. Kim, Keshab K. Parhi
Mode-based Obfuscation using Control-Flow Modifications. CS2@HiPEAC (2016)
Ayan Paul, Sang Phill Park, Dinesh Somasekhar, Young Moon Kim, Nitin Borkar, Ulya R. Karpuzcu, Chris H. Kim
System-Level Power Analysis of a Multicore Multipower Domain Processor With ON-Chip Voltage Regulators. IEEE Trans. Very Large Scale Integr. Syst. 24 (12) (2016)
Somnath Kundu, Bongjin Kim, Chris H. Kim
19.2 A 0.2-to-1.45GHz subsampling fractional-N all-digital MDLL with zero-offset aperture PD-based spur cancellation and in-situ timing mismatch detection. ISSCC (2016)
S. V. Sandeep Avvaru, Chen Zhou, Saroj Satapathy, Yingjie Lao, Chris H. Kim, Keshab K. Parhi
Estimating delay differences of arbiter PUFs using silicon data. DATE (2016)
Somnath Kundu, Chris H. Kim
Frequency-to-Current Conversion-Based Fractional Frequency Synthesizer in 32 nm Utilizing Deep Trench Capacitor. IEEE Trans. Circuits Syst. II Express Briefs (5) (2016)
Meghna G. Mankalale, Zhaoxin Liang, Zhengyang Zhao, Chris H. Kim, Jianping Wang, Sachin S. Sapatnekar
CoMET: Composite-Input Magnetoelectric-based Logic Technology. CoRR (2016)
Chen Zhou, Saroj Satapathy, Yingjie Lao, Keshab K. Parhi, Chris H. Kim
Soft Response Generation and Thresholding Strategies for Linear and Feed-Forward MUX PUFs. ISLPED (2016)
Won Ho Choi, Hoon Ki Kim, Chris H. Kim
Circuit techniques for mitigating short-term vth instability issues in successive approximation register (SAR) ADCs. CICC (2015)
Rahul Parhi, Chris H. Kim, Keshab K. Parhi
Fault-tolerant ripple-carry binary adder using partial triple modular redundancy (PTMR). ISCAS (2015)
Tony Tae-Hyoung Kim, Pong-Fei Lu, Keith A. Jenkins, Chris H. Kim
A Ring-Oscillator-Based Reliability Monitor for Isolated Measurement of NBTI and PBTI in High-k/Metal Gate Technology. IEEE Trans. Very Large Scale Integr. Syst. 23 (7) (2015)
Bongjin Kim, Hoon Ki Kim, Chris H. Kim
An 8bit, 2.6ps two-step TDC in 65nm CMOS employing a switched ring-oscillator based time amplifier. CICC (2015)
Xiaofei Wang, Qianying Tang, Pulkit Jain, Dong Jiao, Chris H. Kim
The Dependence of BTI and HCI-Induced Frequency Degradation on Interconnect Length and Its Circuit Level Implications. IEEE Trans. Very Large Scale Integr. Syst. 23 (2) (2015)
Jongyeon Kim, An Chen, Behtash Behin-Aein, Saurabh Kumar, Jianping Wang, Chris H. Kim
A technology-agnostic MTJ SPICE model with user-defined dimensions for STT-MRAM scalability studies. CICC (2015)
Bongjin Kim, Somnath Kundu, Chris H. Kim
A 0.4-1.6GHz spur-free bang-bang digital PLL in 65nm with a D-flip-flop based frequency subtractor circuit. VLSIC (2015)
Saroj Satapathy, Won Ho Choi, Xiaofei Wang, Chris H. Kim
A revolving reference odometer circuit for BTI-induced frequency fluctuation measurements under fast DVFS transients. IRPS (2015)
Somnath Kundu, Bongjin Kim, Chris H. Kim
Two-step beat frequency quantizer based ADC with adaptive reference control for low swing bio-potential signals. CICC (2015)
Jongyeon Kim, Ayan Paul, Paul A. Crowell, Steven J. Koester, Sachin S. Sapatnekar, Jianping Wang, Chris H. Kim
Spin-Based Computing: Device Concepts, Current Status, and a Case Study on a High-Performance Microprocessor. Proc. IEEE 103 (1) (2015)
Somnath Kundu, Vassili Kireev, Chris H. Kim
A 8-14 GHz varactorless current controlled LC oscillator in 16nm CMOS technology. MWSCAS (2015)
Xiaofei Wang, John Keane, Tony Tae-Hyoung Kim, Pulkit Jain, Qianying Tang, Chris H. Kim
Silicon Odometers: Compact In Situ Aging Sensors for Robust System Design. IEEE Micro 34 (6) (2014)
Brandon Del Bel, Jongyeon Kim, Chris H. Kim, Sachin S. Sapatnekar
Improving STT-MRAM density through multibit error correction. DATE (2014)
Bongjin Kim, Weichao Xu, Chris H. Kim
A Supply-Noise Sensitivity Tracking PLL in 32 nm SOI Featuring a Deep Trench Capacitor Based Loop Filter. IEEE J. Solid State Circuits 49 (4) (2014)
Won Ho Choi, Saroj Satapathy, John Keane, Chris H. Kim
A test circuit based on a ring oscillator array for statistical characterization of Plasma-Induced Damage. CICC (2014)
Xiaofei Wang, Weichao Xu, Chris H. Kim
SRAM read performance degradation under asymmetric NBTI and PBTI stress: Characterization vehicle and statistical aging data. CICC (2014)
Bongjin Kim, Somnath Kundu, Seokkyun Ko, Chris H. Kim
A VCO-based ADC employing a multi-phase noise-shaping beat frequency quantizer for direct sampling of Sub-1mV input signals. CICC (2014)
Qianying Tang, Bongjin Kim, Yingjie Lao, Keshab K. Parhi, Chris H. Kim
True Random Number Generator circuits based on single- and multi-phase beat frequency detection. CICC (2014)
Pingqiang Zhou, Ayan Paul, Chris H. Kim, Sachin S. Sapatnekar
Distributed On-Chip Switched-Capacitor DC-DC Converters Supporting DVFS in Multicore Systems. IEEE Trans. Very Large Scale Integr. Syst. 22 (9) (2014)
Ayan Paul, Chaitanya Kshirsagar, Sachin S. Sapatnekar, Steven J. Koester, Chris H. Kim
Leakage Modeling for Devices with Steep Sub-threshold Slope Considering Random Threshold Variations. VLSI Design (2014)
Seung-Hwan Song, Ki Chul Chun, Chris H. Kim
A Bit-by-Bit Re-Writable Eflash in a Generic 65 nm Logic Process for Moderate-Density Nonvolatile Memory Applications. IEEE J. Solid State Circuits 49 (8) (2014)
Ki Chul Chun, Hui Zhao, Jonathan D. Harms, Tony Tae-Hyoung Kim, Jianping Wang, Chris H. Kim
A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory. IEEE J. Solid State Circuits 48 (2) (2013)
Wei Zhang, Ki Chul Chun, Chris H. Kim
A Write-Back-Free 2T1D Embedded DRAM With Local Voltage Sensing and a Dual-Row-Access Low Power Mode. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2013)
Seung-Hwan Song, Ki Chul Chun, Chris H. Kim
A bit-by-bit re-writable Eflash in a generic logic process for moderate-density embedded non-volatile memory applications. CICC (2013)
Seung-Hwan Song, Ki Chul Chun, Chris H. Kim
A Logic-Compatible Embedded Flash Memory for Zero-Standby Power System-on-Chips Featuring a Multi-Story High Voltage Switch and a Selective Refresh Scheme. IEEE J. Solid State Circuits 48 (5) (2013)
Bongjin Kim, Weichao Xu, Chris H. Kim
A fully-digital beat-frequency based ADC achieving 39dB SNDR for a 1.6mVpp input signal. CICC (2013)
Tony T. Kim, Pong-Fei Lu, Chris H. Kim
Design of ring oscillator structures for measuring isolated NBTI and PBTI. ISCAS (2012)
Ayan Paul, Matt Amrein, Saket Gupta, Arvind Vinod, Abhishek Arun, Sachin S. Sapatnekar, Chris H. Kim
Staggered Core Activation: A circuit/architectural approach for mitigating resonant supply noise issues in multi-core multi-power domain processors. CICC (2012)
Wei Zhang, Ki Chul Chun, Chris H. Kim
A write-back-free 2T1D embedded DRAM with local voltage sensing and a dual-row-access low power mode. CICC (2012)
Ki Chul Chun, Wei Zhang, Pulkit Jain, Chris H. Kim
A 2T1C Embedded DRAM Macro With No Boosted Supplies Featuring a 7T SRAM Based Repair and a Cell Storage Monitor. IEEE J. Solid State Circuits 47 (10) (2012)
Tony Tae-Hyoung Kim, Wei Zhang, Chris H. Kim
Degradation. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2012)
Dong Jiao, Bongjin Kim, Chris H. Kim
Design, Modeling, and Test of a Programmable Adaptive Phase-Shifting PLL for Enhancing Clock Data Compensation. IEEE J. Solid State Circuits 47 (10) (2012)
Seung-Hwan Song, Ki Chul Chun, Chris H. Kim
A logic-compatible embedded flash memory featuring a multi-story high voltage switch and a selective refresh scheme. VLSIC (2012)
Pulkit Jain, John Keane, Chris H. Kim
An array-based Chip Lifetime Predictor macro for gate dielectric failures in core and IO FETs. ESSDERC (2012)
Pingqiang Zhou, Won Ho Choi, Bongjin Kim, Chris H. Kim, Sachin S. Sapatnekar
Optimization of on-chip switched-capacitor DC-DC converters for high-performance applications. ICCAD (2012)
John Keane, Chris H. Kim, Qunzeng Liu, Sachin S. Sapatnekar
Process and Reliability Sensors for Nanoscale CMOS. IEEE Des. Test Comput. 29 (5) (2012)
Ki Chul Chun, Pulkit Jain, Tae-Ho Kim, Chris H. Kim
A 667 MHz Logic-Compatible Embedded DRAM Featuring an Asymmetric 2T Gain Cell for High Speed On-Die Caches. IEEE J. Solid State Circuits 47 (2) (2012)
John Keane, Shrinivas Venkatraman, Paulo F. Butzen, Chris H. Kim
An Array-Based Test Circuit for Fully Automated Gate Dielectric Breakdown Characterization. IEEE Trans. Very Large Scale Integr. Syst. 19 (5) (2011)
Dong Jiao, Chris H. Kim
A programmable adaptive phase-shifting PLL for clock data compensation under resonant supply noise. ISSCC (2011)

Chris H. Kim.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Chris H. Kim