An 8bit, 2.6ps two-step TDC in 65nm CMOS employing a switched ring-oscillator based time amplifier.

Bongjin Kim Hoon Ki Kim Chris H. Kim

Published in: CICC (2015)

Keyphrases

random access memory
cmos technology
nm technology
low cost
high speed
power consumption
feedback loop
post processing
vlsi circuits
digital images
differential equations
low power
dynamic range
analog to digital converter