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Jonathan D. Harms
Publication Activity (10 Years)
Years Active: 2010-2018
Publications (10 Years): 1
Top Topics
Multithreading
Garbage Collection
Memory Requirements
Cache Misses
Top Venues
IEEE Comput. Archit. Lett.
IEEE J. Solid State Circuits
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Publications
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Zamshed I. Chowdhury
,
Jonathan D. Harms
,
S. Karen Khatamifard
,
Masoud Zabihi
,
Yang Lv
,
Andrew Lyle
,
Sachin S. Sapatnekar
,
Ulya R. Karpuzcu
,
Jianping Wang
Efficient In-Memory Processing Using Spintronics.
IEEE Comput. Archit. Lett.
17 (1) (2018)
Ki Chul Chun
,
Hui Zhao
,
Jonathan D. Harms
,
Tony Tae-Hyoung Kim
,
Jianping Wang
,
Chris H. Kim
A Scaling Roadmap and Performance Evaluation of In-Plane and Perpendicular MTJ Based STT-MRAMs for High-Density Cache Memory.
IEEE J. Solid State Circuits
48 (2) (2013)
Shruti Patil
,
Andrew Lyle
,
Jonathan D. Harms
,
David J. Lilja
,
Jianping Wang
Spintronic logic gates for spintronic data using magnetic tunnel junctions.
ICCD
(2010)