Tony T. Kim

Publication Activity (10 Years)

Years Active: 2010-2023
Publications (10 Years): 14

Top Topics

Wearable Devices

Data Compression

Laplacian Pyramid

Top Venues

Publications

Chengshuo Yu, Junjie Mu, Kevin Tshun-Chuan Chai, Tony T. Kim, Bongjin Kim
A Continuous-Time Ising Machine using Coupled Inverter Chains Featuring Fully-Parallel One-Shot Spin Updates. CICC (2023)
Taegeun Yoo, Van Loi Le, Ju Eon Kim, Ngoc Le Ba, Kwang-Hyun Baek, Tony T. Kim
A 137-μW Area-Efficient Real-Time Gesture Recognition System for Smart Wearable Devices. A-SSCC (2018)
Karim Rawy, Ruchi Sharma, Hong-Joon Yoon, Usman Khan, Sang-Woo Kim, Tony T. Kim
An 88% Efficiency 2.4μW to 15.6μW Triboelectric Nanogenerator Energy Harvesting System Based on a Single-Comparator Control Algorithm. A-SSCC (2018)
Neelakantan Narasimman, Dipankar Nag, Kevin Tshun Chuan Chai, Tony T. Kim
A 1.2 V, 0.84 pJ/conv.-Step ultra-low power capacitance to digital converter for microphone based auscultation. CICC (2017)
Van Loi Le, Juhui Li, Alan Chang, Tony T. Kim
An 82% energy-saving change-sensing flip-flop in 40nm CMOS for ultra-low power applications. A-SSCC (2017)
Karim Rawy, Taegeun Yoo, Tony T. Kim
An 88% efficiency MPPT for PV energy harvesting system with novel switch width modulation for output power 100nW to 0.3mW. A-SSCC (2017)
Mini Jayakrishnan, Alan Chang, Tony T. Kim
Library pruning and sigma corner libraries for power efficient variation tolerant processor pipelines. VLSI-SoC (2017)
Myat Thu Linn Aung, Tony T. Kim
Self-contained built-in-self-test/repair transceivers for interconnects in 3DICs. APCCAS (2016)
Neelakantan Narasimman, Tony T. Kim
A 0.3 V, 49 fJ/conv.-step VCO-based delta sigma modulator with self-compensated current reference for variation tolerance. ESSCIRC (2016)
Abhik Das, Yuan Gao, Tony T. Kim
An isolated PoR based pulse generator for TEG energy harvesting with minimum startup of 150 mV and maximum series resistance of 600 Ω. A-SSCC (2016)
Karim Rawy, Felix Kalathiparambil George, Dominic Maurath, Tony T. Kim
A time-based self-adaptive energy-harvesting MPPT with 5.1-µW power consumption and a wide tracking range of 10-µA to 1-mA. ESSCIRC (2016)
Sechang Oh, Ngoc Le Ba, Suyoung Bang, Junwon Jeong, David T. Blaauw, Tony T. Kim, Dennis Sylvester
A 260µW infrared gesture recognition system-on-chip for smart devices. VLSI Circuits (2016)
Karthik Gopal Jayaraman, Karim Rawy, Tony T. Kim
A 0.6-V power efficient digital LDO with 99.7% current efficiency utilizing load current aware clock modulation for fast transient response. APCCAS (2016)
Neelakantan Narasimman, Tony T. Kim
An ultra-low voltage, VCO-based ADC with digital background calibration. ISCAS (2016)
Seyed Mohammad Ali Zeinolabedin, Jun Zhou, Xin Liu, Tony T. Kim
A 0.5V power and area efficient Laplacian Pyramid processing engine using FIFO with adaptive data compression. ESSCIRC (2015)
Tony T. Kim, Jun Zhou, Yong Lian
Opportunities and challenges: Ultra-low voltage digital IC design techniques. ASICON (2015)
Seyed Mohammad Ali Zeinolabedin, Jun Zhou, Xin Liu, Tony T. Kim
An area- and power-efficient FIFO with error-reduced data compression for image/video processing. ISCAS (2014)
Yuan Lin Yeoh, Bo Wang, Xiangyao Yu, Tony T. Kim
A 0.4V 7T SRAM with write through virtual ground and ultra-fine grain power gating switches. ISCAS (2013)
Tony T. Kim, Pong-Fei Lu, Chris H. Kim
Design of ring oscillator structures for measuring isolated NBTI and PBTI. ISCAS (2012)
Zhao Chuan Lee, Kim Ming Ho, Zhi-Hui Kong, Tony T. Kim
NBTI/PBTI-aware wordline voltage control with no boosted supply for stability improvement of half-selected SRAM cells. ISOCC (2012)
Tony T. Kim, Bo Wang, Anh-Tuan Do
High energy efficient ultra-low voltage SRAM design: Device, circuit, and architecture. ISOCC (2012)
Qi Li, Bo Wang, Tony T. Kim
A 5.61 pJ, 16 kb 9T SRAM with single-ended equalized bitlines and fast local write-back for cell stability improvement. ESSDERC (2012)
Qi Li, Tony T. Kim
Analysis of SRAM hierarchical bitlines for optimal performance and variation tolerance. ISOCC (2011)
Qi Li, Tony T. Kim
A 9T subthreshold SRAM bitcell with data-independent bitline leakage for improved bitline swing and variation tolerance. APCCAS (2010)