Login / Signup
Vijay Reddy
Publication Activity (10 Years)
Years Active: 2004-2022
Publications (10 Years): 6
Top Topics
Threshold Selection
High Robustness
Layout Design
Top Venues
IRPS
ISQED
ACM J. Emerg. Technol. Comput. Syst.
IEEE Des. Test
</>
Publications
</>
Bikram Kishore Mahajan
,
Yen-Pu Chen
,
Muhammad Ashraful Alam
,
Dhanoop Varghese
,
Srikanth Krishnan
,
Vijay Reddy
A Critical Examination of the TCAD Modeling of Hot Carrier Degradation for LDMOS Transistors.
IRPS
(2022)
Bikram Kishore Mahajan
,
Yen-Pu Chen
,
Dhanoop Varghese
,
Vijay Reddy
,
Srikanth Krishnan
,
Muhammad Ashraful Alam
Quantifying Region-Specific Hot Carrier Degradation in LDMOS Transistors Using a Novel Charge Pumping Technique.
IRPS
(2021)
Yen-Pu Chen
,
Bikram Kishore Mahajan
,
Dhanoop Varghese
,
Srikanth Krishnan
,
Vijay Reddy
,
Muhammad Ashraful Alam
A Novel 'I-V Spectroscopy' Technique to Deconvolve Threshold Voltage and Mobility Degradation in LDMOS Transistors.
IRPS
(2020)
Nakul Pande
,
Gyusung Park
,
Chris H. Kim
,
Srikanth Krishnan
,
Vijay Reddy
Investigating the Aging Dynamics of Diode-Connected MOS Devices Using an Array-Based Characterization Vehicle in a 65nm Process.
IRPS
(2019)
Gyusung Park
,
Minsu Kim
,
Chris H. Kim
,
Bongjin Kim
,
Vijay Reddy
All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits.
IRPS
(2018)
Senthil Arasu
,
Mehrdad Nourani
,
John M. Carulli
,
Vijay Reddy
Controlling Aging in Timing-Critical Paths.
IEEE Des. Test
33 (4) (2016)
Senthil Arasu
,
Mehrdad Nourani
,
Vijay Reddy
,
John M. Carulli Jr.
,
Gautam Kapila
,
Min Chen
Reliability improvement of logic and clock paths in power-efficient designs.
ACM J. Emerg. Technol. Comput. Syst.
10 (1) (2014)
Senthil Arasu
,
Mehrdad Nourani
,
Frank Cano
,
John M. Carulli
,
Vijay Reddy
Asymmetric aging of clock networks in power efficient designs.
ISQED
(2014)
Haldun Küflüoglu
,
Cathy Chancellor
,
Min Chen
,
Claude Cirba
,
Vijay Reddy
Recovery modeling of negative bias temperature instability (NBTI) for SPICE-compatible circuit aging simulators.
ACM J. Emerg. Technol. Comput. Syst.
10 (1) (2014)
Senthil Arasu
,
Mehrdad Nourani
,
John M. Carulli
,
Kenneth M. Butler
,
Vijay Reddy
A design-for-reliability approach based on grading library cells for aging effects.
ITC
(2013)
Senthil Arasu
,
Mehrdad Nourani
,
Vijay Reddy
,
John M. Carulli
Performance entitlement by exploiting transistor's BTI recovery.
ISQED
(2013)
Min Chen
,
Vijay Reddy
,
Srikanth Krishnan
,
Jay Ondrusek
,
Yu Cao
ACE: A robust variability and aging sensor for high-k/metal gate SoC.
ESSDERC
(2013)
Min Chen
,
Vijay Reddy
,
Srikanth Krishnan
,
Venkatesh Srinivasan
,
Yu Cao
Asymmetric Aging and Workload Sensitive Bias Temperature Instability Sensors.
IEEE Des. Test Comput.
29 (5) (2012)
Rui Zheng
,
Jyothi Velamala
,
Vijay Reddy
,
Varsha Balakrishnan
,
Evelyn Mintarno
,
Subhasish Mitra
,
Srikanth Krishnan
,
Yu Cao
Circuit aging prediction for low-power operation.
CICC
(2009)
Wenping Wang
,
Vijay Reddy
,
Bo Yang
,
Varsha Balakrishnan
,
Srikanth Krishnan
,
Yu Cao
Statistical prediction of circuit aging under process variations.
CICC
(2008)
Wenping Wang
,
Vijay Reddy
,
Anand T. Krishnan
,
Rakesh Vattikonda
,
Srikanth Krishnan
,
Yu Cao
An Integrated Modeling Paradigm of Circuit Reliability for 65nm CMOS Technology.
CICC
(2007)
Charvaka Duvvury
,
Robert Steinhoff
,
Gianluca Boselli
,
Vijay Reddy
,
Hans Kunz
,
Steve Marum
,
Roger Cline
Gate oxide failures due to anomalous stress from HBM ESD testers.
Microelectron. Reliab.
46 (5-6) (2006)
Vijay Reddy
,
Anand T. Krishnan
,
Andrew Marshall
,
John Rodriguez
,
Sreedhar Natarajan
,
Tim Rost
,
Srikanth Krishnan
Impact of negative bias temperature instability on digital circuit reliability.
Microelectron. Reliab.
45 (1) (2005)
Vijay Reddy
,
John M. Carulli
,
Anand T. Krishnan
,
William Bosch
,
Brendan Burgess
Impact of Negative Bias Temperature Instability on Product Parametric Drift.
ITC
(2004)