Min Chen

Publication Activity (10 Years)

Years Active: 2006-2014
Publications (10 Years): 0

Top Topics

Classical Logic

Variance Reduction

Top Venues

ACM J. Emerg. Technol. Comput. Syst.

IEEE Des. Test Comput.

Publications

Senthil Arasu, Mehrdad Nourani, Vijay Reddy, John M. Carulli Jr., Gautam Kapila, Min Chen
Reliability improvement of logic and clock paths in power-efficient designs. ACM J. Emerg. Technol. Comput. Syst. 10 (1) (2014)
Haldun Küflüoglu, Cathy Chancellor, Min Chen, Claude Cirba, Vijay Reddy
Recovery modeling of negative bias temperature instability (NBTI) for SPICE-compatible circuit aging simulators. ACM J. Emerg. Technol. Comput. Syst. 10 (1) (2014)
Min Chen, Vijay Reddy, Srikanth Krishnan, Jay Ondrusek, Yu Cao
ACE: A robust variability and aging sensor for high-k/metal gate SoC. ESSDERC (2013)
Min Chen, Vijay Reddy, Srikanth Krishnan, Venkatesh Srinivasan, Yu Cao
Asymmetric Aging and Workload Sensitive Bias Temperature Instability Sensors. IEEE Des. Test Comput. 29 (5) (2012)
Yun Ye, Frank Liu, Min Chen, Sani R. Nassif, Yu Cao
Statistical Modeling and Simulation of Threshold Variation Under Random Dopant Fluctuations and Line-Edge Roughness. IEEE Trans. Very Large Scale Integr. Syst. 19 (6) (2011)
Srivatsan Chellappa, Jia Ni, Xiaoyin Yao, Nathan D. Hindman, Jyothi Velamala, Min Chen, Yu Cao, Lawrence T. Clark
In-situ characterization and extraction of SRAM variability. DAC (2010)
Min Chen, Wei Zhao, Frank Liu, Yu Cao
Finite-Point-Based Transistor Model: A New Approach to Fast Circuit Simulation. IEEE Trans. Very Large Scale Integr. Syst. 17 (10) (2009)
Chi-Chao Wang, Wei Zhao, Frank Liu, Min Chen, Yu Cao
Modeling of layout-dependent stress effect in CMOS design. ICCAD (2009)
Yun Ye, Frank Liu, Min Chen, Yu Cao
Variability analysis under layout pattern-dependent rapid-thermal annealing process. DAC (2009)
Min Chen, Wei Zhao, Frank Liu, Yu Cao
Fast statistical circuit analysis with finite-point based transistor model. DATE (2007)
Min Chen, Yu Cao
Analysis of Pulse Signaling for Low-Power On-Chip Global Bus Design. ISQED (2006)