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All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits.
Gyusung Park
Minsu Kim
Chris H. Kim
Bongjin Kim
Vijay Reddy
Published in:
IRPS (2018)
Keyphrases
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circuit design
analog vlsi
high speed
real time
mixed signal
phase locked loop
low cost
digital media
chip design
evolutionary algorithm
cloud computing
monitoring system
single chip