3SAT on an All-to-All-Connected CMOS Ising Solver Chip.
M. Hüsrev CilasunZiqing ZengRamprasath SAbhimanyu KumarHao LoWilliam ChoChris H. KimUlya R. KarpuzcuSachin S. SapatnekarPublished in: CoRR (2023)
Keyphrases
- analog vlsi
- high speed
- sat solving
- cmos image sensor
- circuit design
- low cost
- single chip
- cmos technology
- image sensor
- chip design
- phase transition
- low power
- sat problem
- sat solvers
- focal plane
- boolean formula
- random access memory
- dynamic range
- nm technology
- ultra low power
- max sat
- power consumption
- satisfiability problem
- boolean satisfiability
- unit propagation
- weighted max sat
- power dissipation
- satisfiability modulo theories
- backtracking search
- quantified boolean formulas
- mixed signal
- propositional satisfiability
- clause learning
- np complete
- solid state
- search algorithm
- physical design
- power supply
- search strategies
- parallel processing
- constraint satisfaction
- metal oxide semiconductor
- search tree
- lower bound