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A Bit-by-Bit Re-Writable Eflash in a Generic 65 nm Logic Process for Moderate-Density Nonvolatile Memory Applications.
Seung-Hwan Song
Ki Chul Chun
Chris H. Kim
Published in:
IEEE J. Solid State Circuits (2014)
Keyphrases
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random access memory
domain specific
neural network
low cost
logic programs
development process
memory requirements
temporal logic
classical logic