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A Pathway to Enable Exponential Scaling for the Beyond-CMOS Era: Invited.

Jianping WangSachin S. SapatnekarChris H. KimPaul A. CrowellSteven J. KoesterSupriyo DattaKaushik RoyAnand RaghunathanXiaobo Sharon HuMichael T. NiemierAzad NaeemiChia-Ling ChienCaroline A. RossRoland Kawakami
Published in: DAC (2017)
Keyphrases
  • low cost
  • high speed
  • database
  • image processing
  • power consumption
  • linear complexity
  • case study
  • researchers and practitioners
  • circuit design
  • data sets
  • neural network
  • social networks
  • vlsi circuits