A 1.1GHz 12μA/Mb-Leakage SRAM Design in 65nm Ultra-Low-Power CMOS with Integrated Leakage Reduction for Mobile Applications.
Yih WangHong Jo AhnUddalak BhattacharyaTom CoanFatih HamzaogluWalid M. HafezChia-Hong JanPramod KolarSarvesh H. KulkarniJie-Feng LinYong-Gee NgIan PostLiqiong WeiYih ZhangKevin ZhangMark BohrPublished in: ISSCC (2007)