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SRAM Building Block in 65-nm CMOS Process With Actively Clamped Sleep Transistor.

Muhammad M. KhellahDinesh SomasekharYibin YeNam-Sung KimJason HowardGregory RuhlMurad SunnaJames W. TschanzNitin BorkarFatih HamzaogluGunjan PandyaAli FarhangKevin ZhangVivek De
Published in: IEEE J. Solid State Circuits (2007)
Keyphrases
  • building blocks
  • leakage current
  • low voltage
  • electrical properties
  • silicon dioxide
  • power line
  • active learning
  • sleep stage
  • low power
  • back end
  • sleep apnea
  • high speed
  • software components
  • learning algorithm
  • x ray