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Multi-Phase 1 GHz Voltage Doubler Charge Pump in 32 nm Logic Process.
Dinesh Somasekhar
Balaji Srinivasan
Gunjan Pandya
Fatih Hamzaoglu
Muhammad M. Khellah
Tanay Karnik
Kevin Zhang
Published in:
IEEE J. Solid State Circuits (2010)
Keyphrases
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low cost
business processes
design process
process model
iterative process
classical logic