Ching-En Lee

Publication Activity (10 Years)

Years Active: 2000-2022
Publications (10 Years): 10

Top Topics

Visual Object Tracking

Action Classification

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Ind. Electron.

Publications

Junkang Zhu, Wei Tang, Ching-En Lee, Haolei Ye, Eric McCreath, Zhengya Zhang
VOTA: A Heterogeneous Multicore Visual Object Tracking Accelerator Using Correlation Filters. IEEE J. Solid State Circuits 57 (11) (2022)
Junkang Zhu, Wei Tang, Ching-En Lee, Haolei Ye, Eric McCreath, Zhengya Zhang
VOTA: A 2.45TFLOPS/W Heterogeneous Multi-Core Visual Object Tracking Accelerator Based on Correlation Filters. VLSI Circuits (2021)
Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang
SNAP: An Efficient Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference. IEEE J. Solid State Circuits 56 (2) (2021)
Chih-Lung Lin, Ming-Yang Deng, Wen-Ching Chiu, Li-Wei Shih, Jui-Hung Chang, Yu-Sheng Lin, Ching-En Lee
A Pre-Bootstrapping Method for Use in Gate Driver Circuits to Improve the Scan Pulse Delay of High-Resolution TFT-LCD Systems. IEEE Trans. Ind. Electron. 67 (8) (2020)
Thomas Chen, Ching-En Lee, Chester Liu, Zhengya Zhang
A 135-mW 1.70TOPS Sparse Video Sequence Inference SoC for Action Classification. IEEE J. Solid State Circuits 54 (7) (2019)
Jie-Fang Zhang, Ching-En Lee, Chester Liu, Yakun Sophia Shao, Stephen W. Keckler, Zhengya Zhang
SNAP: A 1.67 - 21.55TOPS/W Sparse Neural Acceleration Processor for Unstructured Sparse Deep Neural Network Inference in 16nm CMOS. VLSI Circuits (2019)
Cheng Fu, Shilin Zhu, Hao Su, Ching-En Lee, Jishen Zhao
Towards Fast and Energy-Efficient Binarized Neural Network Inference on FPGA. FPGA (2019)
Cheng Fu, Shilin Zhu, Hao Su, Ching-En Lee, Jishen Zhao
Towards Fast and Energy-Efficient Binarized Neural Network Inference on FPGA. CoRR (2018)
Farhana Sheikh, Oskar Andersson, Ching-En Lee, Feng Xue, Chia-Hsiang Chen, Anuja Vaidya, Ankit Sharma, Tom Tetzlaff
Reconfıgurable and selectively-adaptive signal processing for multi-mode wireless communication. SiPS (2015)
Ching-En Lee, Milos D. Ercegovac
An error-compensated piecewise linear logarithmic arithmetic unit for phong lighting acceleration. ACSSC (2015)
Fuh-Der Chou, Tzu-Yun Chang, Ching-En Lee
A heuristic algorithm to minimize total weighted tardiness on a single machine with release times. Int. Trans. Oper. Res. 12 (2) (2005)
Yu-Hsin Lin, Ching-En Lee
A total standard WIP estimation method for wafer fabrication. Eur. J. Oper. Res. 131 (1) (2001)
Yu-Jen Chang, Ching-En Lee
A bottleneck-based due-date assignment methodology. Int. J. Manuf. Technol. Manag. 1 (2/3) (2000)