Bonan Zhang

Publication Activity (10 Years)

Years Active: 2019-2024
Publications (10 Years): 10

Top Topics

Neural Network Training

Computing Systems

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Peter Deaville, Bonan Zhang, Naveen Verma
A Fully Row/Column-Parallel In-Memory Computing Macro in Foundry MRAM With Differential Readout for Noise Rejection. IEEE J. Solid State Circuits 59 (7) (2024)
Peter Deaville, Bonan Zhang, Naveen Verma
A 256-kb Fully Row/Column-parallel 22nm MRAM In-Memory-Computing Macro with Differential Readout for Robust Parallelization and Scale-up. ESSCIRC (2023)
Saion K. Roy, Han-Mo Ou, Mostafa Gamal Ahmed, Peter Deaville, Bonan Zhang, Naveen Verma, Pavan Kumar Hanumolu, Naresh R. Shanbhag
Compute SNR-boosted 22 nm MRAM-based In-memory Computing Macro using Statistical Error Compensation. ESSCIRC (2023)
Bonan Zhang, Peter Deaville, Naveen Verma
Statistical computing framework and demonstration for in-memory computing systems. DAC (2022)
Peter Deaville, Bonan Zhang, Naveen Verma
A 22nm 128-kb MRAM Row/Column-Parallel In-Memory Computing Macro with Memory-Resistance Boosting and Multi-Column ADC Readout. VLSI Technology and Circuits (2022)
Peter Deaville, Bonan Zhang, Lung-Yen Chen, Naveen Verma
A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area. ESSDERC (2021)
Bonan Zhang, Jingjin Li, Chao Chen, Kyungmi Lee, Ickjai Lee
A Practical Botnet Traffic Detection System Using GNN. CSS (2021)
Bonan Zhang, Lung-Yen Chen, Naveen Verma
Neural Network Training With Stochastic Hardware Models and Software Abstractions. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (4) (2021)
Peter Deaville, Bonan Zhang, Lung-Yen Chen, Naveen Verma
A Maximally Row-Parallel MRAM In-Memory-Computing Macro Addressing Readout Circuit Sensitivity and Area. ESSCIRC (2021)
Bonan Zhang, Lung-Yen Chen, Naveen Verma
Stochastic Data-driven Hardware Resilience to Efficiently Train Inference Models for Stochastic Hardware Implementations. ICASSP (2019)