Chau-Chin Huang

Publication Activity (10 Years)

Years Active: 2013-2020
Publications (10 Years): 7

Top Topics

Hierarchical Classification

Technological Advances

Optimal Placement

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Jianli Chen, Zhifeng Lin, Yun-Chih Kuo, Chau-Chin Huang, Yao-Wen Chang, Shih-Chun Chen, Chun-Han Chiang, Sy-Yen Kuo
Clock-Aware Placement for Large-Scale Heterogeneous FPGAs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Chau-Chin Huang, Gustavo E. Téllez, Gi-Joon Nam, Yao-Wen Chang
Latch Clustering for Timing-Power Co-Optimization. DAC (2020)
Cunxi Yu, Chau-Chin Huang, Gi-Joon Nam, Mihir Choudhury, Victor N. Kravets, Andrew Sullivan, Maciej J. Ciesielski, Giovanni De Micheli
End-to-End Industrial Study of Retiming. ISVLSI (2018)
Chau-Chin Huang, Hsin-Ying Lee, Bo-Qiao Lin, Sheng-Wei Yang, Chin-Hao Chang, Szu-To Chen, Yao-Wen Chang, Tung-Chieh Chen, Ismail Bustany
NTUplace4dr: A Detailed-Routing-Driven Placer for Mixed-Size Circuit Designs With Technology and Region Constraints. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (3) (2018)
Chau-Chin Huang, Bo-Qiao Lin, Hsin-Ying Lee, Yao-Wen Chang, Kuo-Sheng Wu, Jun-Zhi Yang
Graph-Based Logic Bit Slicing for Datapath-Aware Placement. DAC (2017)
Yun-Chih Kuo, Chau-Chin Huang, Shih-Chun Chen, Chun-Han Chiang, Yao-Wen Chang, Sy-Yen Kuo
Clock-aware placement for large-scale heterogeneous FPGAs. ICCAD (2017)
Chau-Chin Huang, Yen-Chun Liu, Yu-Sheng Lu, Yun-Chih Kuo, Yao-Wen Chang, Sy-Yen Kuo
Timing-driven cell placement optimization for early slack histogram compression. DAC (2016)
Chau-Chin Huang, Chien-Hsiung Chiou, Kai-Han Tseng, Yao-Wen Chang
Detailed-Routing-Driven analytical standard-cell placement. ASP-DAC (2015)
Chau-Chin Huang, Hsin-Ying Lee, Bo-Qiao Lin, Sheng-Wei Yang, Chin-Hao Chang, Szu-To Chen, Yao-Wen Chang
Detailed-Routability-Driven Analytical Placement for Mixed-Size Designs with Technology and Region Constraints. ICCAD (2015)
Yi-Fang Chen, Chau-Chin Huang, Chien-Hsiung Chiou, Yao-Wen Chang, Chang-Jen Wang
Routability-Driven Blockage-Aware Macro Placement. DAC (2014)
Meng-Kai Hsu, Yi-Fang Chen, Chau-Chin Huang, Sheng Chou, Tzu-Hen Lin, Tung-Chieh Chen, Yao-Wen Chang
NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (12) (2014)
Meng-Kai Hsu, Yi-Fang Chen, Chau-Chin Huang, Tung-Chieh Chen, Yao-Wen Chang
Routability-driven placement for hierarchical mixed-size circuit designs. DAC (2013)