Yi-Lin Chuang

Publication Activity (10 Years)

Years Active: 2007-2020
Publications (10 Years): 1

Top Topics

Optimization Problems

Smart Home Environment

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Yi-Shyuan Chiang, Ruei-Che Chang, Yi-Lin Chuang, Shih-Ya Chou, Hao-Ping Lee, I-Ju Lin, Jian-Hua Jiang Chen, Yung-Ju Chang
Exploring the Design Space of User-System Communication for Smart-home Routine Assistants. CHI (2020)
Hong-Ting Lin, Yi-Lin Chuang, Zong-Han Yang, Tsung-Yi Ho
Pulsed-Latch Utilization for Clock-Tree Power Optimization. IEEE Trans. Very Large Scale Integr. Syst. 22 (4) (2014)
Da-Cheng Juan, Yi-Lin Chuang, Diana Marculescu, Yao-Wen Chang
Statistical thermal modeling and optimization considering leakage power variations. DATE (2012)
Yi-Lin Chuang, Po-Wei Lee, Yao-Wen Chang
Voltage-Drop Aware Analytical Placement by Global Power Spreading for Mixed-Size Circuit Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (11) (2011)
Yi-Lin Chuang, Sangmin Kim, Youngsoo Shin, Yao-Wen Chang
Pulsed-Latch Aware Placement for Timing-Integrity Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (12) (2011)
Yi-Lin Chuang, Hong-Ting Lin, Tsung-Yi Ho, Yao-Wen Chang, Diana Marculescu
PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs. ICCAD (2011)
Hong-Ting Lin, Yi-Lin Chuang, Tsung-Yi Ho
Pulsed-latch-based clock tree migration for dynamic power reduction. ISLPED (2011)
Yi-Lin Chuang, Gi-Joon Nam, Charles J. Alpert, Yao-Wen Chang, Jarrod A. Roy, Natarajan Viswanathan
Design-hierarchy aware mixed-size placement for routability optimization. ICCAD (2010)
Yi-Lin Chuang, Sangmin Kim, Youngsoo Shin, Yao-Wen Chang
Pulsed-latch aware placement for timing-integrity optimization. DAC (2010)
Yi-Lin Chuang, Po-Wei Lee, Yao-Wen Chang
Voltage-drop aware analytical placement by global power spreading for mixed-size circuit designs. ICCAD (2009)
Hsin-Chen Chen, Yi-Lin Chuang, Yao-Wen Chang, Yung-Chung Chang
Constraint graph-based macro placement for modern mixed-size circuit designs. ICCAD (2008)
Tung-Chieh Chen, Yi-Lin Chuang, Yao-Wen Chang
Effective Wire Models for X-Architecture Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (4) (2008)
Tung-Chieh Chen, Yi-Lin Chuang, Yao-Wen Chang
X-architecture placement based on effective wire models. ISPD (2007)