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Hong-Ting Lin
Publication Activity (10 Years)
Years Active: 2011-2014
Publications (10 Years): 0
Top Topics
Insertions And Deletions
R Tree
Tree Structure
Clock Frequency
Top Venues
ACM Trans. Design Autom. Electr. Syst.
IEEE Trans. Very Large Scale Integr. Syst.
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Publications
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Hong-Ting Lin
,
Yi-Lin Chuang
,
Zong-Han Yang
,
Tsung-Yi Ho
Pulsed-Latch Utilization for Clock-Tree Power Optimization.
IEEE Trans. Very Large Scale Integr. Syst.
22 (4) (2014)
Kuan-Yu Lin
,
Hong-Ting Lin
,
Tsung-Yi Ho
,
Chia-Chun Tsai
Load-balanced clock tree synthesis with adjustable delay buffer insertion for clock skew reduction in multiple dynamic supply voltage designs.
ACM Trans. Design Autom. Electr. Syst.
17 (3) (2012)
Kuan-Yu Lin
,
Hong-Ting Lin
,
Tsung-Yi Ho
An efficient algorithm of adjustable delay buffer insertion for clock skew minimization in multiple dynamic supply voltage designs.
ASP-DAC
(2011)
Yi-Lin Chuang
,
Hong-Ting Lin
,
Tsung-Yi Ho
,
Yao-Wen Chang
,
Diana Marculescu
PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs.
ICCAD
(2011)
Hong-Ting Lin
,
Yi-Lin Chuang
,
Tsung-Yi Ho
Pulsed-latch-based clock tree migration for dynamic power reduction.
ISLPED
(2011)