An efficient algorithm of adjustable delay buffer insertion for clock skew minimization in multiple dynamic supply voltage designs.
Kuan-Yu LinHong-Ting LinTsung-Yi HoPublished in: ASP-DAC (2011)
Keyphrases
- objective function
- learning algorithm
- dynamic programming
- np hard
- significant improvement
- experimental evaluation
- k means
- computational complexity
- optimal solution
- improved algorithm
- search space
- cost function
- matching algorithm
- theoretical analysis
- computationally efficient
- recognition algorithm
- probabilistic model
- tree structure
- optimization algorithm
- expectation maximization
- worst case
- dynamic environments
- simulated annealing
- motion estimation
- genetic algorithm
- computational cost
- preprocessing
- similarity measure
- error function
- quasi newton method