Ujjwal Guin

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 61

Top Topics

Special Session

Hardware Implementation

Integrated Circuit

Reliability Analysis

Top Venues

J. Electron. Test.

Publications

Gaines Odom, Hardhik Mohanty, Ujjwal Guin, Bhaskar Krishnamachari
Blockchain-Enabled Whitelisting Mechanisms for Enhancing Security in 3D ICs. ACM Great Lakes Symposium on VLSI (2024)
Gaines Odom, Zakia Tamanna Tisha, Ujjwal Guin
A Novel Self-referencing Approach Using Memory Power-up States for Detecting COTS SRAMs. VTS (2024)
Yadi Zhong, Joshua Hovanes, Ujjwal Guin
On-Demand Device Authentication using Zero-Knowledge Proofs for Smart Systems. ACM Great Lakes Symposium on VLSI (2023)
Yadi Zhong, Ujjwal Guin
Complexity Analysis of the SAT Attack on Logic Locking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (10) (2023)
Yadi Zhong, Ujjwal Guin
A Comprehensive Test Pattern Generation Approach Exploiting the SAT Attack for Logic Locking. IEEE Trans. Computers 72 (8) (2023)
Yadi Zhong, Ujjwal Guin
Fault-Injection Based Chosen-Plaintext Attacks on Multicycle AES Implementations. ACM Great Lakes Symposium on VLSI (2022)
Yadi Zhong, Ujjwal Guin
Complexity Analysis of the SAT Attack on Logic Locking. CoRR (2022)
Mehdi Sadi, Ujjwal Guin
Test and Yield Loss Reduction of AI and Deep Learning Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (1) (2022)
Yadi Zhong, Ujjwal Guin
AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking. CoRR (2022)
Joshua Hovanes, Yadi Zhong, Ujjwal Guin
Beware of Discarding Used SRAMs: Information is Stored Permanently. CoRR (2022)
Wendong Wang, Adit D. Singh, Ujjwal Guin
A Systematic Bit Selection Method for Robust SRAM PUFs. J. Electron. Test. 38 (3) (2022)
Benjamin J. Lucas, Ali Alwan, Marion Murzello, Yazheng Tu, Pengzhou He, Andrew J. Schwartz, David Guevara, Ujjwal Guin, Kyle Juretus, Jiafeng Xie
Lightweight Hardware Implementation of Binary Ring-LWE PQC Accelerator. IEEE Comput. Archit. Lett. 21 (1) (2022)
Ziqi Zhou, Ujjwal Guin, Peng Li, Vishwani D. Agrawal
Fault Modeling and Test Generation for Technology-Specific Defects of Skyrmion Logic Circuits. VTS (2022)
Yadi Zhong, Ujjwal Guin
A Comprehensive Test Pattern Generation Approach Exploiting SAT Attack for Logic Locking. CoRR (2022)
Yadi Zhong, Ujjwal Guin
Complexity Analysis of the SAT Attack on Logic Locking. IACR Cryptol. ePrint Arch. 2022 (2022)
Yadi Zhong, Ujjwal Guin
Chosen-Plaintext Attack on Energy-Efficient Hardware Implementation of GIFT-COFB. HOST (2022)
Yadi Zhong, Ayush Jain, M. Tanjidur Rahman, Navid Asadizanjani, Jiafeng Xie, Ujjwal Guin
AFIA: ATPG-Guided Fault Injection Attack on Secure Logic Locking. J. Electron. Test. 38 (5) (2022)
Yuqiao Zhang, Chunli Tang, Peng Li, Ujjwal Guin
CamSkyGate: camouflaged skyrmion gates for protecting ICs. DAC (2022)
Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin
Special Session: Reliability Analysis for ML/AI Hardware. CoRR (2021)
Pengzhou He, Ujjwal Guin, Jiafeng Xie
Novel Low-Complexity Polynomial Multiplication Over Hybrid Fields for Efficient Implementation of Binary Ring-LWE Post-Quantum Cryptography. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (2) (2021)
Ziqi Zhou, Ujjwal Guin, Peng Li, Vishwani D. Agrawal
Defect Characterization and Testing of Skyrmion-Based Logic Circuits. VTS (2021)
Ayush Jain, Ziqi Zhou, Ujjwal Guin
TAAL: Tampering Attack on Any Key-based Logic Locked Circuits. ACM Trans. Design Autom. Electr. Syst. 26 (4) (2021)
Yuqiao Zhang, Ayush Jain, Pinchen Cui, Ziqi Zhou, Ujjwal Guin
A novel topology-guided attack and its countermeasure towards secure logic locking. J. Cryptogr. Eng. 11 (3) (2021)
Pratiksha Mittal, Austin Walthall, Pinchen Cui, Anthony Skjellum, Ujjwal Guin
A Blockchain-based Contactless Delivery System for Addressing COVID-19 and Other Pandemics. Blockchain (2021)
Ayush Jain, Ziqi Zhou, Ujjwal Guin
Survey of Recent Developments for Hardware Trojan Detection. ISCAS (2021)
Prattay Chowdhury, Ujjwal Guin, Adit D. Singh, Vishwani D. Agrawal
Estimating Operational Age of an Integrated Circuit. J. Electron. Test. 37 (1) (2021)
Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin
Special Session: Reliability Analysis for AI/ML Hardware. VTS (2021)
Yuqiao Zhang, Ujjwal Guin
End-to-End Traceability of ICs in Component Supply Chain for Fighting Against Recycling. IEEE Trans. Inf. Forensics Secur. 15 (2020)
Ayush Jain, M. Tanjidur Rahman, Ujjwal Guin
ATPG-Guided Fault Injection Attacks on Logic Locking. CoRR (2020)
Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks
Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR (2020)
Jiafeng Xie, Kanad Basu, Kris Gaj, Ujjwal Guin
Special Session: The Recent Advance in Hardware Implementation of Post-Quantum Cryptography. VTS (2020)
Wendong Wang, Ujjwal Guin, Adit D. Singh
Aging-Resilient SRAM-based True Random Number Generator for Lightweight Devices. J. Electron. Test. 36 (3) (2020)
Ayush Jain, Ujjwal Guin
A Novel Tampering Attack on AES Cores with Hardware Trojans. CoRR (2020)
Ayush Jain, Ujjwal Guin
A Novel Tampering Attack on AES Cores with Hardware Trojans. ITC-Asia (2020)
Yuqiao Zhang, Ayush Jain, Pinchen Cui, Ziqi Zhou, Ujjwal Guin
A Novel Topology-Guided Attack and Its Countermeasure Towards Secure Logic Locking. CoRR (2020)
Mehdi Sadi, Ujjwal Guin
Yield Loss Reduction and Test of AI and Deep Learning Accelerators. CoRR (2020)
Ayush Jain, Ujjwal Guin, M. Tanjidur Rahman, Navid Asadizanjani, Danielle Duvalsaint, R. D. Shawn Blanton
Special Session: Novel Attacks on Logic-Locking. VTS (2020)
Md Jubayer al Mahmod, Ujjwal Guin
A Robust, Low-Cost and Secure Authentication Scheme for IoT Applications. Cryptogr. 4 (1) (2020)
Wendong Wang, Ujjwal Guin, Adit D. Singh
A Zero-Cost Detection Approach for Recycled ICs using Scan Architecture. VTS (2020)
Pinchen Cui, Julie Dixon, Ujjwal Guin, Daniel DiMase
A Blockchain-Based Framework for Supply Chain Provenance. IEEE Access 7 (2019)
Ujjwal Guin, Wendong Wang, Charles Harper, Adit D. Singh
Detecting Recycled SoCs by Exploiting Aging Induced Biases in Memory Cells. HOST (2019)
Pinchen Cui, Ujjwal Guin, Anthony Skjellum, David A. Umphress
Blockchain in IoT: Current Trends, Challenges, and Future Roadmap. J. Hardw. Syst. Secur. 3 (4) (2019)
Pinchen Cui, Ujjwal Guin
Countering Botnet of Things using Blockchain-Based Authenticity Framework. ISVLSI (2019)
Ujjwal Guin, Navid Asadizanjani, Mark M. Tehranipoor
Standards for Hardware Security. GetMobile Mob. Comput. Commun. 23 (1) (2019)
Jubayer Mahmod, Spencer K. Millican, Ujjwal Guin, Vishwani D. Agrawal
Special Session: Delay Fault Testing - Present and Future. VTS (2019)
Prattay Chowdhury, Ujjwal Guin, Adit D. Singh, Vishwani D. Agrawal
Two-Pattern ∆IDDQ Test for Recycled IC Detection. VLSI Design (2019)
Ayush Jain, Ziqi Zhou, Ujjwal Guin
TAAL: Tampering Attack on Any Key-based Logic Locked Circuits. CoRR (2019)
Yuqiao Zhang, Pinchen Cui, Ziqi Zhou, Ujjwal Guin
TGA: An Oracle-less and Topology-Guided Attack on Logic Locking. ASHES@CCS (2019)
Benjamin Cyr, Jubayer Mahmod, Ujjwal Guin
Low-Cost and Secure Firmware Obfuscation Method for Protecting Electronic Systems From Cloning. IEEE Internet Things J. 6 (2) (2019)
Mahabubul Alam, Sreeja Chowdhury, Mark M. Tehranipoor, Ujjwal Guin
Robust, low-cost, and accurate detection of recycled ICs using digital signatures. HOST (2018)
Ujjwal Guin, Pinchen Cui, Anthony Skjellum
Ensuring Proof-of-Authenticity of IoT Edge Devices Using Blockchain Technology. iThings/GreenCom/CPSCom/SmartData (2018)
Ujjwal Guin, Ziqi Zhou, Adit D. Singh
Robust Design-for-Security Architecture for Enabling Trust in IC Manufacturing and Test. IEEE Trans. Very Large Scale Integr. Syst. 26 (5) (2018)
Ujjwal Guin, Adit D. Singh, Mahabubul Alam, Janice Canedo, Anthony Skjellum
A Secure Low-Cost Edge Device Authentication Scheme for the Internet of Things. VLSI Design (2018)
Wendong Wang, Adit D. Singh, Ujjwal Guin, Abhijit Chatterjee
Exploiting power supply ramp rate for calibrating cell strength in SRAM PUFs. LATS (2018)
Ziqi Zhou, Ujjwal Guin, Vishwani D. Agrawal
Modeling and test generation for combinational hardware Trojans. VTS (2018)
Mahabubul Alam, Mark M. Tehranipoor, Ujjwal Guin
TSensors Vision, Infrastructure and Security Challenges in Trillion Sensor Era. J. Hardw. Syst. Secur. 1 (4) (2017)
Ujjwal Guin, Ziqi Zhou, Adit D. Singh
A novel design-for-security (DFS) architecture to prevent unauthorized IC overproduction. VTS (2017)
Ujjwal Guin, Swarup Bhunia, Domenic Forte, Mark M. Tehranipoor
SMA: A System-Level Mutual Authentication for Protecting Electronic Hardware and Firmware. IEEE Trans. Dependable Secur. Comput. 14 (3) (2017)
Ujjwal Guin, Qihang Shi, Domenic Forte, Mark M. Tehranipoor
FORTIS: A Comprehensive Solution for Establishing Forward Trust for Protecting IPs and ICs. ACM Trans. Design Autom. Electr. Syst. 21 (4) (2016)
Ujjwal Guin, Domenic Forte, Mark M. Tehranipoor
Design of Accurate Low-Cost On-Chip Structures for Protecting Integrated Circuits Against Recycling. IEEE Trans. Very Large Scale Integr. Syst. 24 (4) (2016)
Bicky Shakya, Ujjwal Guin, Mark M. Tehranipoor, Domenic Forte
Performance optimization for on-chip sensors to detect recycled ICs. ICCD (2015)
Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor
A Comprehensive Framework for Counterfeit Defect Coverage Analysis and Detection Assessment. J. Electron. Test. 30 (1) (2014)
Ujjwal Guin, Xuehui Zhang, Domenic Forte, Mohammad Tehranipoor
Low-cost On-Chip Structures for Combating Die and IC Recycling. DAC (2014)
Ujjwal Guin, Ke Huang, Daniel DiMase, John M. Carulli, Mohammad Tehranipoor, Yiorgos Makris
Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain. Proc. IEEE 102 (8) (2014)
Ujjwal Guin, Daniel DiMase, Mohammad Tehranipoor
Counterfeit Integrated Circuits: Detection, Avoidance, and the Challenges Ahead. J. Electron. Test. 30 (1) (2014)
Ujjwal Guin, Domenic Forte, Mohammad Tehranipoor
Anti-counterfeit Techniques: From Design to Resign. MTV (2013)
Ujjwal Guin, Tapan J. Chakraborty, Mohammad Tehranipoor
Functional Fmax test-time reduction using novel DFTs for circuit initialization. ICCD (2013)
Ujjwal Guin, Chen-Huan Chiang
Design for Bit Error Rate estimation of high speed serial links. VTS (2011)