Mehdi Sadi

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 30

Top Topics

Special Session

Natural Language

Reliability Analysis

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Kaniz Mishty, Mehdi Sadi
Chiplet-Gym: Optimizing Chiplet-based AI Accelerator Design with Reinforcement Learning. CoRR (2024)
Kaniz Mishty, Mehdi Sadi
System and Design Technology Co-Optimization of SOT-MRAM for High-Performance AI Accelerator Memory System. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43 (4) (2024)
R. Alexander Knipper, Kaniz Mishty, Mehdi Sadi, Shubhra Kanti Karmaker Santu
SNNLP: Energy-Efficient Natural Language Processing Using Spiking Neural Networks. CoRR (2024)
Kaniz Mishty, Mehdi Sadi
System and Design Technology Co-optimization of SOT-MRAM for High-Performance AI Accelerator Memory System. CoRR (2023)
Mehdi Sadi, Bashir Mohammad Sabquat Bahar Talukder, Kaniz Mishty, Md. Tauhidur Rahman
Attacking Deep Learning AI Hardware with Universal Adversarial Perturbation. Inf. 14 (9) (2023)
Kaniz Mishty, Mehdi Sadi
System and Design Technology Co-optimization of Chiplet-based AI Accelerator with Machine Learning. ACM Great Lakes Symposium on VLSI (2023)
Mehdi Sadi, Ujjwal Guin
Test and Yield Loss Reduction of AI and Deep Learning Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (1) (2022)
Mehdi Sadi, Yi He, Yanjing Li, Mahabubul Alam, Satwik Kundu, Swaroop Ghosh, Javad Bahrami, Naghmeh Karimi
Special Session: On the Reliability of Conventional and Quantum Neural Network Hardware. VTS (2022)
R. Alexander Knipper, Md. Mahadi Hassan, Mehdi Sadi, Shubhra Kanti Karmaker Santu
Analogy-Guided Evolutionary Pretraining of Binary Word Embeddings. AACL/IJCNLP (1) (2022)
Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin
Special Session: Reliability Analysis for ML/AI Hardware. CoRR (2021)
Kaniz Mishty, Mehdi Sadi
Designing Efficient and High-performance AI Accelerators with Customized STT-MRAM. CoRR (2021)
Kaniz Mishty, Mehdi Sadi
Designing Efficient and High-Performance AI Accelerators With Customized STT-MRAM. IEEE Trans. Very Large Scale Integr. Syst. 29 (10) (2021)
Mehdi Sadi, Bashir M. Sabquat Bahar Talukder, Kaniz Mishty, Md. Tauhidur Rahman
Attacking Deep Learning AI Hardware with Universal Adversarial Perturbation. CoRR (2021)
Farah Ferdaus, Bashir M. Sabquat Bahar Talukder, Mehdi Sadi, Md. Tauhidur Rahman
True Random Number Generation using Latency Variations of Commercial MRAM Chips. ISQED (2021)
Farah Ferdaus, Bashir M. Sabquat Bahar Talukder, Mehdi Sadi, Md. Tauhidur Rahman
True Random Number Generation using Latency Variations of Commercial MRAM Chips. CoRR (2021)
Shamik Kundu, Kanad Basu, Mehdi Sadi, Twisha Titirsha, Shihao Song, Anup Das, Ujjwal Guin
Special Session: Reliability Analysis for AI/ML Hardware. VTS (2021)
Md. Mahbub Alam, Adib Nahiyan, Mehdi Sadi, Domenic Forte, Mark M. Tehranipoor
Soft-HaT: Software-Based Silicon Reprogramming for Hardware Trojan Implementation. ACM Trans. Design Autom. Electr. Syst. 25 (4) (2020)
Mehdi Sadi, Ujjwal Guin
Yield Loss Reduction and Test of AI and Deep Learning Accelerators. CoRR (2020)
Adib Nahiyan, Mehdi Sadi, Rahul Vittal, Gustavo K. Contreras, Domenic Forte, Mark M. Tehranipoor
Hardware Trojan Detection through Information Flow Security Verification. CoRR (2018)
Mehdi Sadi, Sukeshwar Kannan, LeRoy Winemberg, Mark M. Tehranipoor
SoC Speed Binning Using Machine Learning and On-Chip Slack Sensors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (5) (2017)
Adib Nahiyan, Mehdi Sadi, Rahul Vittal, Gustavo K. Contreras, Domenic Forte, Mark M. Tehranipoor
Hardware trojan detection through information flow security verification. ITC (2017)
Mehdi Sadi, Gustavo K. Contreras, Jifeng Chen, LeRoy Winemberg, Mark M. Tehranipoor
Design of Reliable SoCs With BIST Hardware and Machine Learning. IEEE Trans. Very Large Scale Integr. Syst. 25 (11) (2017)
Mehdi Sadi, Sukeshwar Kannan, Luke England, Mark M. Tehranipoor
Design of a digital IP for 3D-IC die-to-die clock synchronization. ISCAS (2017)
Xiaoxiao Wang, Pengyuan Jiao, Mehdi Sadi, Donglin Su, LeRoy Winemberg, Mark M. Tehranipoor
TRO: An On-Chip Ring Oscillator-Based GHz Transient IR-Drop Monitor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (5) (2017)
Mehdi Sadi, Gustavo K. Contreras, Dat Tran, Jifeng Chen, LeRoy Winemberg, Mark M. Tehranipoor
BIST-RM: BIST-assisted reliability management of SoCs using on-chip clock sweeping and machine learning. ITC (2016)
Mehdi Sadi, Mark M. Tehranipoor
Design of a Network of Digital Sensor Macros for Extracting Power Supply Noise Profile in SoCs. IEEE Trans. Very Large Scale Integr. Syst. 24 (5) (2016)
Sukeshwar Kannan, Mehdi Sadi, Luke England
Power delivery in 3D packages: current crowding effects, dynamic IR drop and compensation network using sensors (invited paper). ICCAD (2016)
Liting Yu, Xiaoxiao Wang, Yuanqing Cheng, Xiaoying Zhao, Pengyuan Jiao, Aixin Chen, Donglin Su, LeRoy Winemberg, Mehdi Sadi, Mark M. Tehranipoor
An efficient all-digital IR-Drop Alarmer for DVFS-based SoC. ISCAS (2016)
Mehdi Sadi, Mark M. Tehranipoor, Xiaoxiao Wang, LeRoy Winemberg
Speed Binning Using Machine Learning And On-chip Slack Sensors. ACM Great Lakes Symposium on VLSI (2015)
Mehdi Sadi, LeRoy Winemberg, Mark M. Tehranipoor
A robust digital sensor IP and sensor insertion flow for in-situ path timing slack monitoring in SoCs. VTS (2015)
Mehdi Sadi, Zoe Conroy, Bill Eklow, Matthias Kamm, Nematollah Bidokhti, Mark Mohammad Tehranipoor
An All Digital Distributed Sensor Network Based Framework for Continuous Noise Monitoring and Timing Failure Analysis in SoCs. ATS (2014)
Mehdi Sadi, Mircea Stan
Design of near threshold All Digital Delay Locked Loops. SoCC (2012)